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CMOS Transconductors With Nearly Constant Input Ranges Over Wide Tuning Intervals
Three different bias strategies aimed to reduce the effect of tuning on either the differential input range or the common-mode range of triode-region CMOS transconductors are presented. The method is applied to an original transconductor topology that is optimized to produce ultralow G m values. A p...
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Published in: | IEEE transactions on circuits and systems. 2, Analog and digital signal processing Analog and digital signal processing, 2006-10, Vol.53 (10), p.1002-1006 |
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Main Authors: | , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | Three different bias strategies aimed to reduce the effect of tuning on either the differential input range or the common-mode range of triode-region CMOS transconductors are presented. The method is applied to an original transconductor topology that is optimized to produce ultralow G m values. A prototype circuit, which was designed with the 0.35-mum bipolar-CMOS-DMOS (BCD6) process of STMicroelectronics, is presented. The effectiveness and limitations of the method are characterized by means of electrical simulations |
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ISSN: | 1549-7747 1057-7130 1558-3791 |
DOI: | 10.1109/TCSII.2006.882126 |