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High-Performance Low-Power Selective Precharge Schemes for Address Decoders
Two novel address decoder schemes using selective precharging are presented and analyzed in this paper. These schemes, the AND-NOR and sense amplifier (sense-amp) decoders, are compared to the NOR decoder using 90-nm CMOS technology. The sense-amp decoder dissipates between 29.5% and 50.1% and the A...
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| Published in: | IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2008-09, Vol.55 (9), p.917-921 |
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| cited_by | cdi_FETCH-LOGICAL-c355t-f6e5aab384fad142facc9a5da221701928f436694f2043063801e716982687013 |
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| cites | cdi_FETCH-LOGICAL-c355t-f6e5aab384fad142facc9a5da221701928f436694f2043063801e716982687013 |
| container_end_page | 921 |
| container_issue | 9 |
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| container_title | IEEE transactions on circuits and systems. II, Express briefs |
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| creator | Turi, M.A. Delgado-Frias, J.G. |
| description | Two novel address decoder schemes using selective precharging are presented and analyzed in this paper. These schemes, the AND-NOR and sense amplifier (sense-amp) decoders, are compared to the NOR decoder using 90-nm CMOS technology. The sense-amp decoder dissipates between 29.5% and 50.1% and the AND-NOR decoder dissipates between 73.7% and 104.4% of the energy dissipated by the NOR decoder. The delay of the Sense-Amp decoder is 69.2% and the delay of the AND-NOR decoder is 80.8% of the nor decoder delay. |
| doi_str_mv | 10.1109/TCSII.2008.923435 |
| format | article |
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These schemes, the AND-NOR and sense amplifier (sense-amp) decoders, are compared to the NOR decoder using 90-nm CMOS technology. The sense-amp decoder dissipates between 29.5% and 50.1% and the AND-NOR decoder dissipates between 73.7% and 104.4% of the energy dissipated by the NOR decoder. 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| ispartof | IEEE transactions on circuits and systems. II, Express briefs, 2008-09, Vol.55 (9), p.917-921 |
| issn | 1549-7747 1558-3791 |
| language | eng |
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| source | IEEE Electronic Library (IEL) Journals |
| subjects | Address decoder Circuit simulation Circuits Clocks CMOS CMOS technology Computational modeling Decoders Decoding Delay Dissipation high performance Performance analysis Power generation Random access memory selective precharge sense amplifier (Sense-Amp) Sense amplifiers Synchronization |
| title | High-Performance Low-Power Selective Precharge Schemes for Address Decoders |
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