Investigation of Gate Etch Damage at Metal/High-[Formula Omitted] Gate Dielectric Stack Through Random Telegraph Noise in Gate Edge Direct Tunneling Current

Plasma damage on a high-[Formula Omitted] dielectric at a gate edge during a dry etch process is investigated. The damage was observed to generate slow oxide traps, causing a random telegraph noise (RTN) in a gate edge direct tunneling current. Through the analysis of the RTN, the distribution of th...

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Bibliographic Details
Published in:IEEE electron device letters 2011-04, Vol.32 (4), p.569
Main Authors: Cho, Heung-Jae, Son, Younghwan, Oh, Byoungchan, Jang, Seunghyun, Lee, Jong-Ho, Park, Byung-Gook, Shin, Hyungcheol
Format: Article
Language:English
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Summary:Plasma damage on a high-[Formula Omitted] dielectric at a gate edge during a dry etch process is investigated. The damage was observed to generate slow oxide traps, causing a random telegraph noise (RTN) in a gate edge direct tunneling current. Through the analysis of the RTN, the distribution of the oxide traps in the high-[Formula Omitted] dielectric was obtained, and the plasma-damage-induced oxide traps were found to be distributed over a wide area of the high-[Formula Omitted] sidewall at the gate edge region.
ISSN:0741-3106
1558-0563
DOI:10.1109/LED.2011.2106108