An Area-Efficient 65 nm Radiation-Hard Dual-Modular Flip-Flop to Avoid Multiple Cell Upsets

A layout structure to avoid upsets due to Multiple Cell Upsets (MCUs) is proposed for rad-hard dual-modular Flip-Flops (FFs) called BCDMR (Bistable Cross-coupled Dual-Modular Redundancy) by separating critical components. We have fabricated a 65 nm chip including 30 kbit dual-modular FF arrays on tw...

Full description

Saved in:
Bibliographic Details
Published in:IEEE transactions on nuclear science 2011-12, Vol.58 (6), p.3053-3059
Main Authors: Yamamoto, R., Hamanaka, C., Furuta, J., Kobayashi, K., Onodera, H.
Format: Article
Language:English
Subjects:
65 nm bulk CMOS
Arrays
bi-stable cross-coupled dual-modular (BCDMR)
built-in soft-error resilience (BISER)
Chip formation
CMOS technology
dual-interlocked storage cell (DICE)
Elevated
Errors
flip-flop
Flip-flops
Layout
multiple cell upset (MCU)
Neutron irradiation
Radiation hardening
radiation-hard design
Redundancy
Single event upset
Soft errors
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:A layout structure to avoid upsets due to Multiple Cell Upsets (MCUs) is proposed for rad-hard dual-modular Flip-Flops (FFs) called BCDMR (Bistable Cross-coupled Dual-Modular Redundancy) by separating critical components. We have fabricated a 65 nm chip including 30 kbit dual-modular FF arrays on twin-well and triple-well structures. High-energy broad-spectrum neutron irradiations reveal that no soft error is observed up to 100 MHz in the twin-well, but some errors are observed in the triple well. The triple-well structure is sensitive to MCUs because the p-well potential can be easily elevated.
ISSN:0018-9499
1558-1578
DOI:10.1109/TNS.2011.2169457