A 14 bit 200 MS/s DAC With SFDR >78 dBc, IM3 < -83 dBc and NSD <-163 dBm/Hz Across the Whole Nyquist Band Enabled by Dynamic-Mismatch Mapping

This paper presents a 14 bit 200 MS/s current-steering DAC with a novel digital calibration technique called dynamic-mismatch mapping (DMM). By optimizing the switching sequence of current cells to reduce the dynamic integral nonlinearity in an I-Q domain, the DMM technique digitally calibrates all...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 2011-06, Vol.46 (6), p.1371-1381
Main Authors: Yongjian Tang, Briaire, J, Doris, K, van Veldhoven, R, van Beek, P C W, Hegt, H J A, van Roermund, A H M
Format: Article
Language:English
Subjects:
Applied sciences
Calibration
Circuit properties
Design. Technologies. Operation analysis. Testing
digital-to-analog converter (DAC)
dynamic-mismatch mapping (DMM)
Electric, optical and optoelectronic circuits
Electrical engineering. Electrical power engineering
Electronic circuits
Electronic equipment and fabrication. Passive components, printed wiring boards, connectics
Electronics
error measurement
Exact sciences and technology
Frequency domain analysis
Frequency modulation
Integrated circuits
Linearity
mapping
mismatch
mismatch sensor
Power electronics, power supplies
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Signal convertors
Studies
Switches
switching sequence
Timing
timing error
Transfer functions
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Summary:This paper presents a 14 bit 200 MS/s current-steering DAC with a novel digital calibration technique called dynamic-mismatch mapping (DMM). By optimizing the switching sequence of current cells to reduce the dynamic integral nonlinearity in an I-Q domain, the DMM technique digitally calibrates all mismatch errors so that both the DAC static and dynamic performance can be significantly improved in a wide frequency range. Compared to traditional current source calibration techniques and static-mismatch mapping, DMM can reduce the distortion caused by both amplitude and timing mismatch errors. Compared to dynamic element matching, DMM does not increase the noise floor since the distortion is reduced, not randomized. The DMM DAC was implemented in a 0.14 μm CMOS technology and achieves a state-of-the-art performance of SFDR >; 78 dBc, IM3
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2011.2126410