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Performance of Localized-SOI MOS Devices on (110) Substrates: Impact of Channel Direction
In this letter, we demonstrate the optimization of localized silicon-on-insulator and the functionality of devices on (110) silicon substrates. The influence of several channel directions (i.e., 15 ° , 30 ° , 45 ° , and 60 ° away from the [001] direction) on both hole mobility and electron mobility...
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Published in: | IEEE electron device letters 2011-08, Vol.32 (8), p.996-998 |
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Main Authors: | , , , , , , , , , , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites |
Online Access: | Get full text |
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Summary: | In this letter, we demonstrate the optimization of localized silicon-on-insulator and the functionality of devices on (110) silicon substrates. The influence of several channel directions (i.e., 15 ° , 30 ° , 45 ° , and 60 ° away from the [001] direction) on both hole mobility and electron mobility has been investigated. Finally, the electrical characteristics of 55-nm-gate-length n-channel and p-channel metal-oxide-semiconductor transistors are presented, showing a good subthreshold behavior and confirming the interest of (110) ultrathin body/box devices for low-power applications. |
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ISSN: | 0741-3106 1558-0563 |
DOI: | 10.1109/LED.2011.2151829 |