Compiler and run-time support for exploiting regularity within irregular applications

• Published in: IEEE transactions on parallel and distributed systems 2000-02, Vol.11 (2), p.119-135
• Main Authors: Lain, A., Chakrabarti, D.R., Banerjee, P.
• Format: Article
• Language: English
• Subjects: Algorithms; Application software; Arrays; Costs; Distributed computing; Distributed memory; Hardware; Inspection; Interprocessor communication; Irregularities; Parallel architectures; Performance evaluation; Representations; Run time (computers); Runtime; Scalability; Schedules; Standardization; Studies
• ISSN: 1045-9219; 1558-2183
• DOI: 10.1109/71.841749

This paper starts from a well-known idea, that structure in irregular problems improves sequential performance, and tries to show that the same structure can also be exploited for parallelization of irregular problems on a distributed-memory multicomputer. In particular, we extend a well-known parallelization technique called run-time compilation to use structure information that is explicit on the array subscripts. This paper presents a number of internal representations suited to particular access patterns and shows how various preprocessing structures such as translation tables, trace arrays, and interprocessor communication schedules can be encoded in terms of one or more of these representations. We show how loop and index normalization are important for detection of irregularity in array references, as well as the presence of locality in such references. This paper presents methods for detection of irregularity, feasibility of inspection, and finally, placement of inspectors and interprocessor communication schedules. We show that this process can be automated through extensions to an HPF/Fortran-77 distributed-memory compiler (PARADIGM) and a new runtime support for irregular problems (PILAR) that uses a variety of internal representations of communication patterns. We devise performance measures which consider the relationship between the inspection cost, the execution cost, and the number of times the executor is invoked so that a comparison of the competing schemes can be performed independent of the number of iterations. Finally, we show experimental results on an IBM SP-2 that validate our approach. These results show that dramatic improvements in both memory requirements and execution time can be achieved by using these techniques.