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A Waveform-Dependent Phase-Noise Analysis for Edge-Combining DLL Frequency Multipliers
Output phase noise for edge-combining delay-locked loops (DLLs) is derived in this study, which is obtained by decomposing the synthesized output waveform into a noise-free signal and a corresponding noise perturbation on it. The noise-free signal, which is affected by the systematic errors as the p...
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Published in: | IEEE transactions on microwave theory and techniques 2012-04, Vol.60 (4), p.1086-1096 |
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description | Output phase noise for edge-combining delay-locked loops (DLLs) is derived in this study, which is obtained by decomposing the synthesized output waveform into a noise-free signal and a corresponding noise perturbation on it. The noise-free signal, which is affected by the systematic errors as the phase offset between phase detector inputs or delay mismatches among delay cells, possesses a periodic steady-state solution, and therefore leads to output spur. The noise perturbation, on the other hand, will be upconverted to the frequency-multiplied output based on this solution. A general analysis approach is provided that can be applied to the case such as the change of the frequency multiplication factor or the variation of the output duty cycle. The theory is verified by a programmable edge-combining DLL, which has been realized in a CMOS 90-nm technology. The predicted output phase noise has close agreement with simulation results, as well as the measurement data when the frequency multiplication factor changes. |
doi_str_mv | 10.1109/TMTT.2012.2183379 |
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The noise-free signal, which is affected by the systematic errors as the phase offset between phase detector inputs or delay mismatches among delay cells, possesses a periodic steady-state solution, and therefore leads to output spur. The noise perturbation, on the other hand, will be upconverted to the frequency-multiplied output based on this solution. A general analysis approach is provided that can be applied to the case such as the change of the frequency multiplication factor or the variation of the output duty cycle. The theory is verified by a programmable edge-combining DLL, which has been realized in a CMOS 90-nm technology. The predicted output phase noise has close agreement with simulation results, as well as the measurement data when the frequency multiplication factor changes.</description><identifier>ISSN: 0018-9480</identifier><identifier>EISSN: 1557-9670</identifier><identifier>DOI: 10.1109/TMTT.2012.2183379</identifier><identifier>CODEN: IETMAB</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Circuit properties ; Circuits of signal characteristics conditioning (including delay circuits) ; Clocks ; CMOS ; Delay ; Delay-locked loop (DLL) ; Design. Technologies. Operation analysis. Testing ; Dynamic link libraries ; edge combiner ; Electric, optical and optoelectronic circuits ; Electronic circuits ; Electronics ; Exact sciences and technology ; frequency multiplier ; Frequency synthesizers ; Integrated circuits ; Jitter ; Mathematical model ; Microwaves ; Multiplication ; Noise ; noise transfer function (NTF) ; periodic steady state (PSS) ; Perturbation methods ; Phase noise ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Signal convertors ; spur ; Studies ; Waveforms</subject><ispartof>IEEE transactions on microwave theory and techniques, 2012-04, Vol.60 (4), p.1086-1096</ispartof><rights>2015 INIST-CNRS</rights><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. 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The noise-free signal, which is affected by the systematic errors as the phase offset between phase detector inputs or delay mismatches among delay cells, possesses a periodic steady-state solution, and therefore leads to output spur. The noise perturbation, on the other hand, will be upconverted to the frequency-multiplied output based on this solution. A general analysis approach is provided that can be applied to the case such as the change of the frequency multiplication factor or the variation of the output duty cycle. The theory is verified by a programmable edge-combining DLL, which has been realized in a CMOS 90-nm technology. The predicted output phase noise has close agreement with simulation results, as well as the measurement data when the frequency multiplication factor changes.</description><subject>Applied sciences</subject><subject>Circuit properties</subject><subject>Circuits of signal characteristics conditioning (including delay circuits)</subject><subject>Clocks</subject><subject>CMOS</subject><subject>Delay</subject><subject>Delay-locked loop (DLL)</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Dynamic link libraries</subject><subject>edge combiner</subject><subject>Electric, optical and optoelectronic circuits</subject><subject>Electronic circuits</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>frequency multiplier</subject><subject>Frequency synthesizers</subject><subject>Integrated circuits</subject><subject>Jitter</subject><subject>Mathematical model</subject><subject>Microwaves</subject><subject>Multiplication</subject><subject>Noise</subject><subject>noise transfer function (NTF)</subject><subject>periodic steady state (PSS)</subject><subject>Perturbation methods</subject><subject>Phase noise</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. 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Testing</topic><topic>Dynamic link libraries</topic><topic>edge combiner</topic><topic>Electric, optical and optoelectronic circuits</topic><topic>Electronic circuits</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>frequency multiplier</topic><topic>Frequency synthesizers</topic><topic>Integrated circuits</topic><topic>Jitter</topic><topic>Mathematical model</topic><topic>Microwaves</topic><topic>Multiplication</topic><topic>Noise</topic><topic>noise transfer function (NTF)</topic><topic>periodic steady state (PSS)</topic><topic>Perturbation methods</topic><topic>Phase noise</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Signal convertors</topic><topic>spur</topic><topic>Studies</topic><topic>Waveforms</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>LIAO, Fang-Ren</creatorcontrib><creatorcontrib>LU, Shey-Shi</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE/IET Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on microwave theory and techniques</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>LIAO, Fang-Ren</au><au>LU, Shey-Shi</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A Waveform-Dependent Phase-Noise Analysis for Edge-Combining DLL Frequency Multipliers</atitle><jtitle>IEEE transactions on microwave theory and techniques</jtitle><stitle>TMTT</stitle><date>2012-04-01</date><risdate>2012</risdate><volume>60</volume><issue>4</issue><spage>1086</spage><epage>1096</epage><pages>1086-1096</pages><issn>0018-9480</issn><eissn>1557-9670</eissn><coden>IETMAB</coden><abstract>Output phase noise for edge-combining delay-locked loops (DLLs) is derived in this study, which is obtained by decomposing the synthesized output waveform into a noise-free signal and a corresponding noise perturbation on it. The noise-free signal, which is affected by the systematic errors as the phase offset between phase detector inputs or delay mismatches among delay cells, possesses a periodic steady-state solution, and therefore leads to output spur. The noise perturbation, on the other hand, will be upconverted to the frequency-multiplied output based on this solution. A general analysis approach is provided that can be applied to the case such as the change of the frequency multiplication factor or the variation of the output duty cycle. The theory is verified by a programmable edge-combining DLL, which has been realized in a CMOS 90-nm technology. The predicted output phase noise has close agreement with simulation results, as well as the measurement data when the frequency multiplication factor changes.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TMTT.2012.2183379</doi><tpages>11</tpages></addata></record> |
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subjects | Applied sciences Circuit properties Circuits of signal characteristics conditioning (including delay circuits) Clocks CMOS Delay Delay-locked loop (DLL) Design. Technologies. Operation analysis. Testing Dynamic link libraries edge combiner Electric, optical and optoelectronic circuits Electronic circuits Electronics Exact sciences and technology frequency multiplier Frequency synthesizers Integrated circuits Jitter Mathematical model Microwaves Multiplication Noise noise transfer function (NTF) periodic steady state (PSS) Perturbation methods Phase noise Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Signal convertors spur Studies Waveforms |
title | A Waveform-Dependent Phase-Noise Analysis for Edge-Combining DLL Frequency Multipliers |
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