Assembling 2-D Blocks Into 3-D Chips

Despite numerous advantages of 3-D integrated circuits (ICs), their commercial success remains limited. In part, this is due to the wide availability of trustworthy intellectual property (IP) blocks developed for 2-D ICs and proven through repeated use. Block-based design reuse is imperative for het...

Full description

Saved in:
Bibliographic Details
Published in:IEEE transactions on computer-aided design of integrated circuits and systems 2012-02, Vol.31 (2), p.228-241
Main Authors: Knechtel, Johann, Markov, I. L., Lienig, J.
Format: Article
Language:English
Subjects:
3-D IC design styles
3-D integrated circuits (ICs)
Assembling
Availability
Blocking
Chips
Design engineering
Dies
floorplan optimization
Integrated circuit interconnections
Integrated circuits
intellectual property (IP) blocks
IP networks
Layout
Logic gates
Pins
Three dimensional
through-silicon via (TSV) planning
Through-silicon vias
TSV islands
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:Despite numerous advantages of 3-D integrated circuits (ICs), their commercial success remains limited. In part, this is due to the wide availability of trustworthy intellectual property (IP) blocks developed for 2-D ICs and proven through repeated use. Block-based design reuse is imperative for heterogeneous 3-D ICs where memory, logic, analog, and microelectromechanical systems dies are manufactured at different technology nodes and circuit modules cannot be partitioned among several dies. In this paper, we show how to integrate 2-D IP blocks into 3-D chips without altering their layout. Experiments indicate that the overhead of proposed integration is small, which can help accelerate industry adoption of 3-D integration.
ISSN:0278-0070
1937-4151
DOI:10.1109/TCAD.2011.2174640