The flash memory read path: building blocks and critical aspects

The ever-increasing demand for portable equipment is leading to the use of flash memory devices for nonvolatile storage. Fast access time and low power consumption are obviously key requirements. Moreover, multilevel storage techniques are mandatory to reduce the cost per megabit. As a consequence,...

Full description

Saved in:
Bibliographic Details
Published in:Proceedings of the IEEE 2003-04, Vol.91 (4), p.537-553
Main Authors: Micheloni, R., Crippa, L., Sangalli, M., Campardo, G.
Format: Article
Language:English
Subjects:
Acceleration
Access time
Circuits
Cost engineering
Costs
Decoding
Devices
Electronic switching systems
Energy consumption
Flash memory
Flash memory (computers)
Marketing
Matrix converters
Multilevel
Power consumption
Timing
Voltage
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:The ever-increasing demand for portable equipment is leading to the use of flash memory devices for nonvolatile storage. Fast access time and low power consumption are obviously key requirements. Moreover, multilevel storage techniques are mandatory to reduce the cost per megabit. As a consequence, the READ operation becomes more and more critical, and optimized solutions are needed for almost all circuits involved in the read path. This paper examines the whole read path from addresses to data output, and describes several schemes developed to achieve the required high performances.
ISSN:0018-9219
1558-2256
DOI:10.1109/JPROC.2003.811704