Blanket SMT With In Situ N2 Plasma Treatment on the langle hbox 100 rangle Wafer for the Low-Cost Low-Power Technology Application

PMOS degradation with the blanket-stress-memory-technique (SMT) nitride layer on the (100) wafer with ?100? orientation has been observed, and the degradation mechanism is examined. The boron-doping loss from both the PMOS gate and the source/drain region during the SMT process is the root cause. In...

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Bibliographic Details
Published in:IEEE electron device letters 2009-01, Vol.30 (9)
Main Authors: Yuan, Jun, Chan, V, Rovedo, N, Sardesai, V, Kanike, N, Varadarajan, V, Yu, M, Ho Yang, Jong, Jeong, Y K, Kwon, O S, Belyansky, M P, Eller, M, Meng Lee, Yong, Cave, N, Shang, Huiling, Li, Ying, Divakaruni, R
Format: Article
Language:English
Subjects:
Blanketing
Degradation
Deposition
Drains
Gates
Niobium base alloys
Orientation
Wafers
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Summary:PMOS degradation with the blanket-stress-memory-technique (SMT) nitride layer on the (100) wafer with ?100? orientation has been observed, and the degradation mechanism is examined. The boron-doping loss from both the PMOS gate and the source/drain region during the SMT process is the root cause. In situ N2 plasma treatment before the SMT layer deposition has been implemented for the first time to recover PMOS performance on the ?100? wafer by reducing the boron-doping loss from the gate and the source/drain region. Reliability like PMOS NBTI has been examined, and no degradation is observed.
ISSN:0741-3106
DOI:10.1109/LED.2009.2025895