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Decoding of Raptor codes on embedded systems

Raptor codes have been proven very suitable for mobile multimedia content delivery. A systematic Raptor code is employed for the application layer Forward Error Correction (FEC), schemes of the 3rd Generation Partnership Project (3GPP), Multimedia Broadcast/Multicast Service (MBMS) and standard and...

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Bibliographic Details
Published in:Microprocessors and microsystems 2012-07, Vol.36 (5), p.375-382
Main Authors: Mladenov, Todor, Nooshabadi, Saeid, Montiel-Nelson, Juan A., Kim, Kiseon
Format: Article
Language:English
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Summary:Raptor codes have been proven very suitable for mobile multimedia content delivery. A systematic Raptor code is employed for the application layer Forward Error Correction (FEC), schemes of the 3rd Generation Partnership Project (3GPP), Multimedia Broadcast/Multicast Service (MBMS) and standard and the IP Datacast over Digital Video Broadcasting (DVB) services. Those services run on mobile devices powered by embedded systems. This paper analyzes the performance, energy profile and resource implication of Raptor decoder on a system on a chip (SoC) platform with a soft-core embedded processor. At the heart of the Raptor decoder for binary erasure channel (BEC) is the decoding of the pre-code. The following three methods are used for that task: Belief Propagation (BP), Gaussian Elimination (GE) and the 3GPP inactivation decoding Gaussian elimination (IDGE). The paper analyzes the error correction capability and the complexity of each algorithm on embedded system. Additionally, the paper investigates how the cache size, matrix memory type and organization affect the algorithms under consideration. Finally, a power and energy dissipation analysis for the operation of the three algorithms under consideration is presented.
ISSN:0141-9331
1872-9436
DOI:10.1016/j.micpro.2012.02.009