Architecture design of low-power motion estimation based on DHS-NPDS for H.264/AVC

A novel architecture of motion estimation （ME） based on improved normalized partial distortion search is proposed to meet three primary requirements for real-time video encoding, which are low-power, low- bandwidth and high area utilization efficiency. The ME engine supports both normalized partial...

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Bibliographic Details
Published in:Science China. Information sciences 2012-10, Vol.55 (10), p.2234-2242
Main Authors: Chen, YunBi, Li, ZhengDong, Guo, Li, Xie, JinSheng, Zhao, Long
Format: Article
Language:English
Subjects:
Adaptive search techniques
Architecture
China
CMOS
Computer architecture
Computer Science
Distortion
Engines
H.264/AVC
Hardware
Information Systems and Communication Service
Motion simulation
Power efficiency
Research Paper
Searching
低功耗
国土安全部
实时视频编码
建筑设计
美国
运动估计
面积利用率
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Summary:A novel architecture of motion estimation （ME） based on improved normalized partial distortion search is proposed to meet three primary requirements for real-time video encoding, which are low-power, low- bandwidth and high area utilization efficiency. The ME engine supports both normalized partial distortion search and adaptive search window adjustment. The former can reduce the computational complexity of ME to save power and area; the latter can avoid unnecessary accessing the external memory to lower the data bandwidth. The proposed engine has been implemented with UMC 90nm CMOS technology. The implementation results show that, compared with traditional engines, the engine can achieve significant improvements of the hardware efficiency and the power efficiency respectively with a little throughput compromise.
ISSN:1674-733X
1869-1919
DOI:10.1007/s11432-011-4459-5