Silicon-on-insulator chip-to-chip coupling via out-of-plane or vertical grating couplers

In this work, we study the possibility of chip-to-chip interconnections via out-of-plane grating couplers or vertical grating couplers (VGCs) fabricated on silicon-on-insulator (SOI) technology. Mathematical and experimental results for the efficiency of coupling light between two such grating coupl...

Full description

Saved in:
Bibliographic Details
Published in:Applied optics (2004) 2012-12, Vol.51 (34), p.8090-8094
Main Authors: Cabezón, Miguel, Garcés, Ignacio, Villafranca, Asier, Pozo, José, Kumar, Pragati, Kaźmierczak, Andrzej
Format: Article
Language:English
Subjects:
Computational efficiency
Computing time
Couplers
Diffraction gratings
Gratings (spectra)
Joining
Mathematical analysis
Misalignment
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:In this work, we study the possibility of chip-to-chip interconnections via out-of-plane grating couplers or vertical grating couplers (VGCs) fabricated on silicon-on-insulator (SOI) technology. Mathematical and experimental results for the efficiency of coupling light between two such grating couplers have been presented. The VGCs are placed vertically against each other in order to study the effect of spatial misalignments on the light coupling efficiency. Waveguides and VGCs are designed according to standard SOI fabrication processes. A two-dimensional finite-difference time-domain method is used for the simulations. Measurements are performed on different combinations of 4 samples on the chip. Light coupling efficiency of -8  dB is achieved and tolerances to misalignments in 3 spatial dimensions are provided.
ISSN:1559-128X
2155-3165
DOI:10.1364/AO.51.008090