LDPC DECODER MODELLING AND EVALUATION USING RT-PEPA

This paper presents a high-throughput memory efficient decoder for Low Density Parity Check (LDPC) codes in the high-rate wireless personal area network application. The novel techniques which can apply to our selected LDPC code is proposed, including parallel blocked layered decoding architecture a...

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Bibliographic Details
Published in:International journal of wireless & mobile networks 2012-08, Vol.4 (4), p.87-87
Main Author: Tsang, Tony
Format: Article
Language:English
Subjects:
Algebra
Architecture
Computer programs
Decoders
Density
Networks
Supplying
Wireless communication
Online Access:Get full text
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Summary:This paper presents a high-throughput memory efficient decoder for Low Density Parity Check (LDPC) codes in the high-rate wireless personal area network application. The novel techniques which can apply to our selected LDPC code is proposed, including parallel blocked layered decoding architecture and simplification of the WiGig networks. We use Real Time - Performance Evaluation Process Algebra (RTPEPA) to evaluate a typical LDPC Decoder system's performance. The approach is more convenient, flexible, and lower cost than the former simulation method which needs develop special hardware and software tools. Moreover, we can easily analysis how changes in performance depend on changes in a particular modes by supplying ranges for parameter values.
ISSN:0975-4679
0975-3834
DOI:10.5121/ijwmn.2012.4406