Evaluation and analysis of an on-line error detection monitoring technique

• Published in: Computers & electrical engineering 2013-02, Vol.39 (2), p.261-273
• Main Authors: Punt, Marija, Tomasevic, Milo, Djordjevic, Jovan
• Format: Article
• Language: English
• Subjects: Computer simulation; Electrical engineering; Error detection; Faults; Mathematical models; Monitoring; Monitors; On-line systems
• ISSN: 0045-7906; 1879-0755
• DOI: 10.1016/j.compeleceng.2012.11.011

[Display omitted] ► A proposed on-line monitoring technique of a program control flow was evaluated. ► A dedicated simulation environment with a bit-flip fault injector was developed. ► An extensive performance evaluation with a representative benchmark was carried out. ► The error coverage was high for most of the error categories examined (up to 99%). A previously proposed technique for on-line monitoring of program control flow is extensively evaluated in the paper. This technique, which employs an external monitor, is briefly described. The performance evaluation was carried out in a specially designed simulation environment that can inject artificial faults according to the single bit-flip model. The faults were injected in the processor itself, on the bus lines and in the memory. An evaluation study was conducted with a representative benchmark program. First, the memory overhead and execution time overhead of the monitored program were obtained. Then, typical performance indicators such as error detection and latency were presented for the different fault categories itemized by the location and means of detection. The results thoroughly discussed in this paper show that the technique is able to detect a high percentage of the injected faults manifested as control flow errors with an acceptable time and memory overhead.