Gate current modeling and optimal design of nanoscale non-overlapped gate to source/drain MOSFET

A novel nanoscale MOSFET with a source/drain-to-gate non-overlapped and high-k spacer structure has been demonstrated to reduce the gate leakage current for the first time.The gate leakage behaviour of the novel MOSFET structure has been investigated with the help of a compact analytical model and S...

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Bibliographic Details
Published in:Journal of semiconductors 2011-07, Vol.32 (7), p.14-19
Main Authors: Rana, Ashwani K, Chand, Narottam, Kapoor, Vinod
Format: Article
Language:English
Subjects:
Drains
Gates
Leakage current
MOSFET
MOSFETs
Nanocomposites
Nanostructure
Semiconductors
Spacers
串联电阻
优化设计
关断电流
建模
漏电流
电场诱导
纳米级
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Summary:A novel nanoscale MOSFET with a source/drain-to-gate non-overlapped and high-k spacer structure has been demonstrated to reduce the gate leakage current for the first time.The gate leakage behaviour of the novel MOSFET structure has been investigated with the help of a compact analytical model and Sentaurus simulation. A fringing gate electric field through the dielectric spacer induces an inversion layer in the non-overlap region to act as an extended S/D（source/drain） region.It is found that an optimal source/drain-to-gate non-overlapped and high-A：spacer structure has reduced the gate leakage current to a great extent as compared to those of an overlapped structure.Further,the proposed structure had improved off current,subthreshold slope and drain induced barrier lowering（DIBL） characteristics.It is concluded that this structure solves the problem of high leakage current without introducing extra series resistance.
ISSN:1674-4926
DOI:10.1088/1674-4926/32/7/074001