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Effect of Oxygen, Moisture and Illumination on the Stability and Reliability of Dinaphtho[2,3-b:2′,3′-f]thieno[3,2-b]thiophene (DNTT) OTFTs during Operation and Storage

We report a systemic study of the stability of organic thin film transistors (OTFTs) both in storage and under operation. Apart from a thin polystyrene buffer layer spin-coated onto the gate dielectric, the constituent parts of the OTFTs were all prepared by vacuum evaporation. The OTFTs are based o...

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Bibliographic Details
Published in:ACS applied materials & interfaces 2014-09, Vol.6 (17), p.15224-15231
Main Authors: Ding, Ziqian, Abbas, Gamal, Assender, Hazel E, Morrison, John J, Yeates, Stephen G, Patchett, Eifion R, Taylor, D. Martin
Format: Article
Language:English
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Summary:We report a systemic study of the stability of organic thin film transistors (OTFTs) both in storage and under operation. Apart from a thin polystyrene buffer layer spin-coated onto the gate dielectric, the constituent parts of the OTFTs were all prepared by vacuum evaporation. The OTFTs are based on the semiconducting small molecule dinaphtho­[2,3-b:2′,3′-f]­thieno­[3,2-b]­thiophene (DNTT) deposited onto the surface of a polystyrene-buffered in situ polymerized diacrylate gate insulator. Over a period of 9 months, no degradation of the hole mobility occurred in devices stored either in the dark in dry air or in uncontrolled air and normal laboratory fluorescent lighting conditions. In the latter case, rather than decreasing, the mobility actually increased almost 2-fold to 1.5 cm2/(V·s). The devices also showed good stability during repeat on/off cycles in the dark in dry air. Exposure to oxygen and light during the on/off cycles led to a positive shift of the transfer curves due to electron trapping when the DNTT was biased into depletion by the application of positive gate voltage. When operated in accumulation, negative gate voltage under the same conditions, the transfer curves were stable. When voltage cycling in moist air in the dark, the transfer curves shifted to negative voltages, thought to be due to the generation of hole traps either in the semiconductor or its interface with the dielectric layer. When subjected to gate bias stress in dry air in the dark for at least 144 h, the device characteristics remained stable.
ISSN:1944-8244
1944-8252
DOI:10.1021/am503560d