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Mitigating Prefetcher-Caused Pollution Using Informed Caching Policies for Prefetched Blocks
Many modern high-performance processors prefetch blocks into the on-chip cache. Prefetched blocks can potentially pollute the cache by evicting more useful blocks. In this work, we observe that both accurate and inaccurate prefetches lead to cache pollution, and propose a comprehensive mechanism to...
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Published in: | ACM transactions on architecture and code optimization 2015-01, Vol.11 (4), p.1-22 |
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container_title | ACM transactions on architecture and code optimization |
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creator | Seshadri, Vivek Yedkar, Samihan Xin, Hongyi Mutlu, Onur Gibbons, Phillip B Kozuch, Michael A Mowry, Todd C |
description | Many modern high-performance processors prefetch blocks into the on-chip cache. Prefetched blocks can potentially pollute the cache by evicting more useful blocks. In this work, we observe that both accurate and inaccurate prefetches lead to cache pollution, and propose a comprehensive mechanism to mitigate prefetcher-caused cache pollution. First, we observe that over 95% of useful prefetches in a wide variety of applications are not reused after the first demand hit (in secondary caches). Based on this observation, our first mechanism simply demotes a prefetched block to the lowest priority on a demand hit. Second, to address pollution caused by inaccurate prefetches, we propose a self-tuning prefetch accuracy predictor to predict if a prefetch is accurate or inaccurate. Only predicted-accurate prefetches are inserted into the cache with a high priority. Evaluations show that our final mechanism, which combines these two ideas, significantly improves performance compared to both the baseline LRU policy and two state-of-the-art approaches to mitigating prefetcher-caused cache pollution (up to 49%, and 6% on average for 157 two-core multiprogrammed workloads). The performance improvement is consistent across a wide variety of system configurations. |
doi_str_mv | 10.1145/2677956 |
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fullrecord | <record><control><sourceid>proquest_cross</sourceid><recordid>TN_cdi_proquest_miscellaneous_1660058783</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>1655729537</sourcerecordid><originalsourceid>FETCH-LOGICAL-c390t-54a64929cf2e2d36f3653cd54c5d92a9d4d3616e87927cc6ac4dcf019d36c9bc3</originalsourceid><addsrcrecordid>eNqNkEtPwzAQhC0EEqUg_kJucAn47foIEY9KRfRAb0iRWTutwY2LnRz496S0iCunXc1-s9IMQucEXxHCxTWVSmkhD9CICM5LphU7_N2FlMfoJOd3jKmmGI_Q65Pv_NJ0vl0W8-Qa18HKpbIyfXa2mMcQ-s7HtljkLTFtm5jWw6EysPqxxODBu1wM-p_fFrchwkc-RUeNCdmd7ecYLe7vXqrHcvb8MK1uZiUwjbtScCO5phoa6qhlsmFSMLCCg7CaGm35IBLpJkpTBSANcAsNJnqQQb8BG6PL3d9Nip-9y1299hlcCKZ1sc81kRJjMVET9g9UCEW1YGpAL3YopJjzkK3eJL826asmuN5WXe-rZt_DhnAq</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>1655729537</pqid></control><display><type>article</type><title>Mitigating Prefetcher-Caused Pollution Using Informed Caching Policies for Prefetched Blocks</title><source>Association for Computing Machinery:Jisc Collections:ACM OPEN Journals 2023-2025 (reading list)</source><creator>Seshadri, Vivek ; Yedkar, Samihan ; Xin, Hongyi ; Mutlu, Onur ; Gibbons, Phillip B ; Kozuch, Michael A ; Mowry, Todd C</creator><creatorcontrib>Seshadri, Vivek ; Yedkar, Samihan ; Xin, Hongyi ; Mutlu, Onur ; Gibbons, Phillip B ; Kozuch, Michael A ; Mowry, Todd C</creatorcontrib><description>Many modern high-performance processors prefetch blocks into the on-chip cache. Prefetched blocks can potentially pollute the cache by evicting more useful blocks. In this work, we observe that both accurate and inaccurate prefetches lead to cache pollution, and propose a comprehensive mechanism to mitigate prefetcher-caused cache pollution. First, we observe that over 95% of useful prefetches in a wide variety of applications are not reused after the first demand hit (in secondary caches). Based on this observation, our first mechanism simply demotes a prefetched block to the lowest priority on a demand hit. Second, to address pollution caused by inaccurate prefetches, we propose a self-tuning prefetch accuracy predictor to predict if a prefetch is accurate or inaccurate. Only predicted-accurate prefetches are inserted into the cache with a high priority. Evaluations show that our final mechanism, which combines these two ideas, significantly improves performance compared to both the baseline LRU policy and two state-of-the-art approaches to mitigating prefetcher-caused cache pollution (up to 49%, and 6% on average for 157 two-core multiprogrammed workloads). The performance improvement is consistent across a wide variety of system configurations.</description><identifier>ISSN: 1544-3566</identifier><identifier>EISSN: 1544-3973</identifier><identifier>DOI: 10.1145/2677956</identifier><language>eng</language><subject>Demand ; Optimization ; Performance enhancement ; Policies ; Pollution abatement ; Priorities ; Processors ; State of the art ; Workload</subject><ispartof>ACM transactions on architecture and code optimization, 2015-01, Vol.11 (4), p.1-22</ispartof><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c390t-54a64929cf2e2d36f3653cd54c5d92a9d4d3616e87927cc6ac4dcf019d36c9bc3</citedby><cites>FETCH-LOGICAL-c390t-54a64929cf2e2d36f3653cd54c5d92a9d4d3616e87927cc6ac4dcf019d36c9bc3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,780,784,27924,27925</link.rule.ids></links><search><creatorcontrib>Seshadri, Vivek</creatorcontrib><creatorcontrib>Yedkar, Samihan</creatorcontrib><creatorcontrib>Xin, Hongyi</creatorcontrib><creatorcontrib>Mutlu, Onur</creatorcontrib><creatorcontrib>Gibbons, Phillip B</creatorcontrib><creatorcontrib>Kozuch, Michael A</creatorcontrib><creatorcontrib>Mowry, Todd C</creatorcontrib><title>Mitigating Prefetcher-Caused Pollution Using Informed Caching Policies for Prefetched Blocks</title><title>ACM transactions on architecture and code optimization</title><description>Many modern high-performance processors prefetch blocks into the on-chip cache. Prefetched blocks can potentially pollute the cache by evicting more useful blocks. In this work, we observe that both accurate and inaccurate prefetches lead to cache pollution, and propose a comprehensive mechanism to mitigate prefetcher-caused cache pollution. First, we observe that over 95% of useful prefetches in a wide variety of applications are not reused after the first demand hit (in secondary caches). Based on this observation, our first mechanism simply demotes a prefetched block to the lowest priority on a demand hit. Second, to address pollution caused by inaccurate prefetches, we propose a self-tuning prefetch accuracy predictor to predict if a prefetch is accurate or inaccurate. Only predicted-accurate prefetches are inserted into the cache with a high priority. Evaluations show that our final mechanism, which combines these two ideas, significantly improves performance compared to both the baseline LRU policy and two state-of-the-art approaches to mitigating prefetcher-caused cache pollution (up to 49%, and 6% on average for 157 two-core multiprogrammed workloads). The performance improvement is consistent across a wide variety of system configurations.</description><subject>Demand</subject><subject>Optimization</subject><subject>Performance enhancement</subject><subject>Policies</subject><subject>Pollution abatement</subject><subject>Priorities</subject><subject>Processors</subject><subject>State of the art</subject><subject>Workload</subject><issn>1544-3566</issn><issn>1544-3973</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><recordid>eNqNkEtPwzAQhC0EEqUg_kJucAn47foIEY9KRfRAb0iRWTutwY2LnRz496S0iCunXc1-s9IMQucEXxHCxTWVSmkhD9CICM5LphU7_N2FlMfoJOd3jKmmGI_Q65Pv_NJ0vl0W8-Qa18HKpbIyfXa2mMcQ-s7HtljkLTFtm5jWw6EysPqxxODBu1wM-p_fFrchwkc-RUeNCdmd7ecYLe7vXqrHcvb8MK1uZiUwjbtScCO5phoa6qhlsmFSMLCCg7CaGm35IBLpJkpTBSANcAsNJnqQQb8BG6PL3d9Nip-9y1299hlcCKZ1sc81kRJjMVET9g9UCEW1YGpAL3YopJjzkK3eJL826asmuN5WXe-rZt_DhnAq</recordid><startdate>20150109</startdate><enddate>20150109</enddate><creator>Seshadri, Vivek</creator><creator>Yedkar, Samihan</creator><creator>Xin, Hongyi</creator><creator>Mutlu, Onur</creator><creator>Gibbons, Phillip B</creator><creator>Kozuch, Michael A</creator><creator>Mowry, Todd C</creator><scope>AAYXX</scope><scope>CITATION</scope><scope>7TV</scope><scope>C1K</scope><scope>7SC</scope><scope>8FD</scope><scope>FR3</scope><scope>JQ2</scope><scope>KR7</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope></search><sort><creationdate>20150109</creationdate><title>Mitigating Prefetcher-Caused Pollution Using Informed Caching Policies for Prefetched Blocks</title><author>Seshadri, Vivek ; Yedkar, Samihan ; Xin, Hongyi ; Mutlu, Onur ; Gibbons, Phillip B ; Kozuch, Michael A ; Mowry, Todd C</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c390t-54a64929cf2e2d36f3653cd54c5d92a9d4d3616e87927cc6ac4dcf019d36c9bc3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2015</creationdate><topic>Demand</topic><topic>Optimization</topic><topic>Performance enhancement</topic><topic>Policies</topic><topic>Pollution abatement</topic><topic>Priorities</topic><topic>Processors</topic><topic>State of the art</topic><topic>Workload</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Seshadri, Vivek</creatorcontrib><creatorcontrib>Yedkar, Samihan</creatorcontrib><creatorcontrib>Xin, Hongyi</creatorcontrib><creatorcontrib>Mutlu, Onur</creatorcontrib><creatorcontrib>Gibbons, Phillip B</creatorcontrib><creatorcontrib>Kozuch, Michael A</creatorcontrib><creatorcontrib>Mowry, Todd C</creatorcontrib><collection>CrossRef</collection><collection>Pollution Abstracts</collection><collection>Environmental Sciences and Pollution Management</collection><collection>Computer and Information Systems Abstracts</collection><collection>Technology Research Database</collection><collection>Engineering Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Civil Engineering Abstracts</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts – Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>ACM transactions on architecture and code optimization</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Seshadri, Vivek</au><au>Yedkar, Samihan</au><au>Xin, Hongyi</au><au>Mutlu, Onur</au><au>Gibbons, Phillip B</au><au>Kozuch, Michael A</au><au>Mowry, Todd C</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Mitigating Prefetcher-Caused Pollution Using Informed Caching Policies for Prefetched Blocks</atitle><jtitle>ACM transactions on architecture and code optimization</jtitle><date>2015-01-09</date><risdate>2015</risdate><volume>11</volume><issue>4</issue><spage>1</spage><epage>22</epage><pages>1-22</pages><issn>1544-3566</issn><eissn>1544-3973</eissn><abstract>Many modern high-performance processors prefetch blocks into the on-chip cache. Prefetched blocks can potentially pollute the cache by evicting more useful blocks. In this work, we observe that both accurate and inaccurate prefetches lead to cache pollution, and propose a comprehensive mechanism to mitigate prefetcher-caused cache pollution. First, we observe that over 95% of useful prefetches in a wide variety of applications are not reused after the first demand hit (in secondary caches). Based on this observation, our first mechanism simply demotes a prefetched block to the lowest priority on a demand hit. Second, to address pollution caused by inaccurate prefetches, we propose a self-tuning prefetch accuracy predictor to predict if a prefetch is accurate or inaccurate. Only predicted-accurate prefetches are inserted into the cache with a high priority. Evaluations show that our final mechanism, which combines these two ideas, significantly improves performance compared to both the baseline LRU policy and two state-of-the-art approaches to mitigating prefetcher-caused cache pollution (up to 49%, and 6% on average for 157 two-core multiprogrammed workloads). The performance improvement is consistent across a wide variety of system configurations.</abstract><doi>10.1145/2677956</doi><tpages>22</tpages><oa>free_for_read</oa></addata></record> |
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subjects | Demand Optimization Performance enhancement Policies Pollution abatement Priorities Processors State of the art Workload |
title | Mitigating Prefetcher-Caused Pollution Using Informed Caching Policies for Prefetched Blocks |
url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-24T18%3A39%3A39IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_cross&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Mitigating%20Prefetcher-Caused%20Pollution%20Using%20Informed%20Caching%20Policies%20for%20Prefetched%20Blocks&rft.jtitle=ACM%20transactions%20on%20architecture%20and%20code%20optimization&rft.au=Seshadri,%20Vivek&rft.date=2015-01-09&rft.volume=11&rft.issue=4&rft.spage=1&rft.epage=22&rft.pages=1-22&rft.issn=1544-3566&rft.eissn=1544-3973&rft_id=info:doi/10.1145/2677956&rft_dat=%3Cproquest_cross%3E1655729537%3C/proquest_cross%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-c390t-54a64929cf2e2d36f3653cd54c5d92a9d4d3616e87927cc6ac4dcf019d36c9bc3%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_pqid=1655729537&rft_id=info:pmid/&rfr_iscdi=true |