P-176L: Late-News Poster: A 3.7Gb/s Clock-embedded Intra-Panel Interface for the Large-sized UHD 120Hz LCD TV Application

• Published in: SID International Symposium Digest of technical papers 2014-06, Vol.45 (1), p.1195-1198
• Main Authors: Jeon, Hyun-Kyu, Kim, Byung-Guk, Cho, Hyun-Ho, Choi, Jung-Hwan, Ko, Seung-Oh, Oh, Suk-Jae, Kim, Sang-Woo, Seo, Jeong-Il, Jeong, Yong-Ik, Na, Jun-Ho, Kang, Pil-Sung, Son, Min-Sik, Park, Se-Ryong, Kim, Jae-Hak, Park, Jun-Yeong, Park, Jun, Hong, Jin-Cheol, Baek, Jong-Sang
• Format: Article
• Language: English
• Subjects: Channels; column driver; Columns (process); Data transmission; Field programmable gate arrays; intra-panel interface; LCD; Liquid crystal displays; Modules; Receivers; Semiconductors; signaling; Television; timing controller; UHD
• ISSN: 0097-966X; 2168-0159
• DOI: 10.1002/j.2168-0159.2014.tb00311.x

An Intra‐panel interface that supports 3.7Gb/s data transmission on the ultra‐high definition (UHD) TV application is proposed. The interface channel of display module for UHD TV consists of long PCB traces and flexible flat cable (FFC), which severely degrade the signal quality of transmitted signal. To support over 3Gb/s data rate in the interface channel of UHD display, the receiver in the column driver is equipped with a continuous‐time linear equalizer (CTLE) with adjustable equalization step and data sampler with improved setup and hold time. The transmitter for the proposed interface is implemented using a field programmable gate array (FPGA). The column driver with the proposed receiver is fabricated with a 0.18um high‐voltage CMOS process. The proposed interface is verified with 84‐inch UHD (3840RGBx2160) resolution TFT‐LCD module with 10‐bit color depth and 120Hz refresh rate for large‐sized TV application. The proposed receiver in the column driver achieves 3.7Gb/s data rate in wafer test and 3.1Gbps data rate that is the maximum data rate in the pattern generator at the LCD module with 80‐cm FFC.