Wide‐locking range class‐C injection‐locked frequency divider

• Published in: Electronics letters 2014-11, Vol.50 (23), p.1710-1712
• Main Authors: Jang, Sheng‐Lyang, Lin, Chih‐Yuan
• Format: Article
• Language: English
• Subjects: Bias; capacitive cross‐coupled oscillator; CMOS; CMOS analogue integrated circuits; core power consumption; dc‐gate bias; divide‐by‐3 injection‐locked frequency divider; drain bias; Drains; Electric potential; frequency 10.5 GHz to 15.3 GHz; frequency 3.3 GHz; frequency 4.8 GHz; Frequency dividers; injection locked oscillators; Locking; locking range; microwave integrated circuits; microwave oscillators; Oscillators; Power consumption; size 0.18 mum; standard CMOS process; Voltage; wide‐locking range class‐C ILFD
• ISSN: 1350-911X; 0013-5194; 1350-911X
• DOI: 10.1049/el.2014.3115

A novel wide‐locking range divide‐by‐3 injection‐locked frequency divider (ILFD) is designed and fabricated in a standard 0.18 μm CMOS process. The CMOS ILFD uses a class‐C capacitive cross‐coupled oscillator as the core. It has been found that the locking range of the ILFD is enhanced when the DC‐gate bias is smaller than the drain bias in the cross‐coupled pair. At the supply voltage of 1.8 V, the core power consumption of the ILFD core is 10.7 mW. At the incident power of 0 dBm, the maximum locking range is 3.3 GHz (24.17%), from the incident frequency 12–15.3 GHz. At the incident power of 0 dBm, the operation range is 4.8 GHz (37.2%), from the incident frequency 10.5–15.3 GHz.