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Effective use of Multi-Core Architecture through Multi-Threading towards Computation Intensive Signal Processing Applications

With the advent of Multicore architecture availability, exploiting parallelism is posing certain trends and tides for application deployment. Earlier approaches to explore parallelism in applications were limited to either instruction level parallelism (ILP) or use of architectural redundant resourc...

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Published in:International journal of computer applications 2015-01, Vol.110 (1), p.6-9
Main Authors: Deshmukh, Prathmesh, Kurup, Akhil, Kulkarni, Shailesh V
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Language:English
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creator Deshmukh, Prathmesh
Kurup, Akhil
Kulkarni, Shailesh V
description With the advent of Multicore architecture availability, exploiting parallelism is posing certain trends and tides for application deployment. Earlier approaches to explore parallelism in applications were limited to either instruction level parallelism (ILP) or use of architectural redundant resources. In this paper, we attempted to use multicore processor to demonstrate the speedup in compute intensive tasks such as Convolution, primitive to most Digital Signal Processing algorithms. Further result of multithreaded application on Multicore processor compared with single core is demonstrated for lower and upper limit of granularity for application fragmentation. This work suggests the need for design of memory manager for Multithreading to exploit it more effectively.
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fullrecord <record><control><sourceid>proquest_cross</sourceid><recordid>TN_cdi_proquest_miscellaneous_1669851568</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>3594498631</sourcerecordid><originalsourceid>FETCH-LOGICAL-c1327-441e229fd672ee8843ae37755c208c58235df5a9f3978125feea4d3f6494d5543</originalsourceid><addsrcrecordid>eNpdkdFLwzAQxoMoOOZe_AsKvohQbZKmSR7HmDqYKDifS0gva0bX1CRVfPB_t3V7EI-Du-P78cHxIXSJs1uGSXaHJeEizQrBT9Akk5ylQgh--mc_R7MQdtlQVJJC5hP0vTQGdLQfkPQBEmeSp76JNl04D8nc69rGQe6HI9be9dv6qG9qD6qy7TaJ7lP5KiQLt-_6qKJ1bbJqI7RhNH2121Y1yYt3GkIY-XnXNVb_cuECnRnVBJgd5xS93S83i8d0_fywWszXqcaU8DTPMRAiTVVwAiBEThVQzhnTJBOaCUJZZZiShkouMGEGQOUVNUUu84qxnE7R9cG38-69hxDLvQ0amka14PpQ4qKQgmFWiAG9-ofuXO-HH0aKMT42HaibA6W9C8GDKTtv98p_lTgrxzDK3zDKMQz6A7NufGE</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>1655755753</pqid></control><display><type>article</type><title>Effective use of Multi-Core Architecture through Multi-Threading towards Computation Intensive Signal Processing Applications</title><source>Freely Accessible Science Journals - check A-Z of ejournals</source><creator>Deshmukh, Prathmesh ; Kurup, Akhil ; Kulkarni, Shailesh V</creator><creatorcontrib>Deshmukh, Prathmesh ; Kurup, Akhil ; Kulkarni, Shailesh V</creatorcontrib><description>With the advent of Multicore architecture availability, exploiting parallelism is posing certain trends and tides for application deployment. Earlier approaches to explore parallelism in applications were limited to either instruction level parallelism (ILP) or use of architectural redundant resources. In this paper, we attempted to use multicore processor to demonstrate the speedup in compute intensive tasks such as Convolution, primitive to most Digital Signal Processing algorithms. Further result of multithreaded application on Multicore processor compared with single core is demonstrated for lower and upper limit of granularity for application fragmentation. This work suggests the need for design of memory manager for Multithreading to exploit it more effectively.</description><identifier>ISSN: 0975-8887</identifier><identifier>EISSN: 0975-8887</identifier><identifier>DOI: 10.5120/19278-0687</identifier><language>eng</language><publisher>New York: Foundation of Computer Science</publisher><subject>Algorithms ; Architecture (computers) ; Availability ; Microprocessors ; Redundant ; Signal processing ; Tasks ; Trends</subject><ispartof>International journal of computer applications, 2015-01, Vol.110 (1), p.6-9</ispartof><rights>Copyright Foundation of Computer Science 2015</rights><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,776,780,27901,27902</link.rule.ids></links><search><creatorcontrib>Deshmukh, Prathmesh</creatorcontrib><creatorcontrib>Kurup, Akhil</creatorcontrib><creatorcontrib>Kulkarni, Shailesh V</creatorcontrib><title>Effective use of Multi-Core Architecture through Multi-Threading towards Computation Intensive Signal Processing Applications</title><title>International journal of computer applications</title><description>With the advent of Multicore architecture availability, exploiting parallelism is posing certain trends and tides for application deployment. Earlier approaches to explore parallelism in applications were limited to either instruction level parallelism (ILP) or use of architectural redundant resources. In this paper, we attempted to use multicore processor to demonstrate the speedup in compute intensive tasks such as Convolution, primitive to most Digital Signal Processing algorithms. Further result of multithreaded application on Multicore processor compared with single core is demonstrated for lower and upper limit of granularity for application fragmentation. This work suggests the need for design of memory manager for Multithreading to exploit it more effectively.</description><subject>Algorithms</subject><subject>Architecture (computers)</subject><subject>Availability</subject><subject>Microprocessors</subject><subject>Redundant</subject><subject>Signal processing</subject><subject>Tasks</subject><subject>Trends</subject><issn>0975-8887</issn><issn>0975-8887</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><recordid>eNpdkdFLwzAQxoMoOOZe_AsKvohQbZKmSR7HmDqYKDifS0gva0bX1CRVfPB_t3V7EI-Du-P78cHxIXSJs1uGSXaHJeEizQrBT9Akk5ylQgh--mc_R7MQdtlQVJJC5hP0vTQGdLQfkPQBEmeSp76JNl04D8nc69rGQe6HI9be9dv6qG9qD6qy7TaJ7lP5KiQLt-_6qKJ1bbJqI7RhNH2121Y1yYt3GkIY-XnXNVb_cuECnRnVBJgd5xS93S83i8d0_fywWszXqcaU8DTPMRAiTVVwAiBEThVQzhnTJBOaCUJZZZiShkouMGEGQOUVNUUu84qxnE7R9cG38-69hxDLvQ0amka14PpQ4qKQgmFWiAG9-ofuXO-HH0aKMT42HaibA6W9C8GDKTtv98p_lTgrxzDK3zDKMQz6A7NufGE</recordid><startdate>20150101</startdate><enddate>20150101</enddate><creator>Deshmukh, Prathmesh</creator><creator>Kurup, Akhil</creator><creator>Kulkarni, Shailesh V</creator><general>Foundation of Computer Science</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope></search><sort><creationdate>20150101</creationdate><title>Effective use of Multi-Core Architecture through Multi-Threading towards Computation Intensive Signal Processing Applications</title><author>Deshmukh, Prathmesh ; Kurup, Akhil ; Kulkarni, Shailesh V</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c1327-441e229fd672ee8843ae37755c208c58235df5a9f3978125feea4d3f6494d5543</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2015</creationdate><topic>Algorithms</topic><topic>Architecture (computers)</topic><topic>Availability</topic><topic>Microprocessors</topic><topic>Redundant</topic><topic>Signal processing</topic><topic>Tasks</topic><topic>Trends</topic><toplevel>online_resources</toplevel><creatorcontrib>Deshmukh, Prathmesh</creatorcontrib><creatorcontrib>Kurup, Akhil</creatorcontrib><creatorcontrib>Kulkarni, Shailesh V</creatorcontrib><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts – Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>International journal of computer applications</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Deshmukh, Prathmesh</au><au>Kurup, Akhil</au><au>Kulkarni, Shailesh V</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Effective use of Multi-Core Architecture through Multi-Threading towards Computation Intensive Signal Processing Applications</atitle><jtitle>International journal of computer applications</jtitle><date>2015-01-01</date><risdate>2015</risdate><volume>110</volume><issue>1</issue><spage>6</spage><epage>9</epage><pages>6-9</pages><issn>0975-8887</issn><eissn>0975-8887</eissn><abstract>With the advent of Multicore architecture availability, exploiting parallelism is posing certain trends and tides for application deployment. Earlier approaches to explore parallelism in applications were limited to either instruction level parallelism (ILP) or use of architectural redundant resources. In this paper, we attempted to use multicore processor to demonstrate the speedup in compute intensive tasks such as Convolution, primitive to most Digital Signal Processing algorithms. Further result of multithreaded application on Multicore processor compared with single core is demonstrated for lower and upper limit of granularity for application fragmentation. This work suggests the need for design of memory manager for Multithreading to exploit it more effectively.</abstract><cop>New York</cop><pub>Foundation of Computer Science</pub><doi>10.5120/19278-0687</doi><tpages>4</tpages><oa>free_for_read</oa></addata></record>
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source Freely Accessible Science Journals - check A-Z of ejournals
subjects Algorithms
Architecture (computers)
Availability
Microprocessors
Redundant
Signal processing
Tasks
Trends
title Effective use of Multi-Core Architecture through Multi-Threading towards Computation Intensive Signal Processing Applications
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-06T06%3A39%3A20IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_cross&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Effective%20use%20of%20Multi-Core%20Architecture%20through%20Multi-Threading%20towards%20Computation%20Intensive%20Signal%20Processing%20Applications&rft.jtitle=International%20journal%20of%20computer%20applications&rft.au=Deshmukh,%20Prathmesh&rft.date=2015-01-01&rft.volume=110&rft.issue=1&rft.spage=6&rft.epage=9&rft.pages=6-9&rft.issn=0975-8887&rft.eissn=0975-8887&rft_id=info:doi/10.5120/19278-0687&rft_dat=%3Cproquest_cross%3E3594498631%3C/proquest_cross%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-c1327-441e229fd672ee8843ae37755c208c58235df5a9f3978125feea4d3f6494d5543%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_pqid=1655755753&rft_id=info:pmid/&rfr_iscdi=true