DC-Bus Electrolytic Capacitor Stress in Adjustable-Speed Drives Under Input Voltage Unbalance and Sag Conditions

• Published in: IEEE transactions on industry applications 2007-03, Vol.43 (2), p.495-504
• Main Authors: Lee, K., Jahns, T.M., Venkataramanan, G., Berkopec, W.E.
• Format: Article
• Language: English
• Subjects: Adjustable-speed drives; Capacitors; Closed-form solution; Electric potential; electrolytic capacitor stress; Electrolytic capacitors; Exact solutions; Frequency; Impedance; input voltage sag and unbalance; Mathematical analysis; Power capacitors; power quality; Power system harmonics; Rectifiers; Sag; Stress; Temperature; Unbalance; Variable speed drives; Voltage; Voltage fluctuations
• ISSN: 0093-9994; 1939-9367
• DOI: 10.1109/TIA.2006.889910

This paper analyzes the effects of the input voltage unbalance and sags on the dc-bus electrolytic capacitors in adjustable-speed drives (ASDs) in order to predict their impact on expected capacitor lifetime. The key phenomenon that causes these problems is the transition of the rectifier stage from three-phase to single-phase operation. Since the equivalent series resistance increases at low frequencies, the low-order harmonic current components (e.g., 120 and 240 Hz) contribute disproportionately to the capacitor power losses and temperature rise, resulting in reduced lifetime. Closed-form expressions are developed for predicting these effects including the impact of finite line impedance, finite bus capacitance, and varying load. The impact of inverter space-vector pulsewidth-modulation switching on the capacitor loss is also included. Simulations and experimental tests are used to verify the accuracy and effectiveness of the closed-form analysis using a 5-hp ASD system