Coplanar Waveguides on High-Resistivity Silicon Substrates With Attenuation Constant Lower Than 1 dB/mm for Microwave and Millimeter-Wave Bands

Coplanar waveguides (CPWs) with extremely low loss have been successfully developed on high-resistivity silicon (HR-Si) substrates as interposers of multichip modules for microwave and millimeter-wave bands. The attenuation constant of these CPWs on HR-Si is less than 1 dB/mm for frequencies up to 1...

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Bibliographic Details
Published in:IEEE transactions on electron devices 2011-03, Vol.58 (3), p.709-715
Main Authors: Makita, T, Tamai, I, Seki, S
Format: Article
Language:English
Subjects:
Applied sciences
Attenuation
Attenuation constant
Bands
Conductivity
Coplanar waveguides
coplanar waveguides (CPWs)
Design. Technologies. Operation analysis. Testing
Electronics
equivalent circuit calculation
Exact sciences and technology
high-resistivity silicon substrate
Integrated circuits
low-resistivity layer
Mathematical analysis
Microelectronic fabrication (materials and surfaces technology)
Microwaves
Noise levels
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Semiconductors
Silicon
Silicon compounds
Silicon substrates
Stripline
Substrates
transmission line theory
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Summary:Coplanar waveguides (CPWs) with extremely low loss have been successfully developed on high-resistivity silicon (HR-Si) substrates as interposers of multichip modules for microwave and millimeter-wave bands. The attenuation constant of these CPWs on HR-Si is less than 1 dB/mm for frequencies up to 100 GHz, which is comparable with that of CPWs on semi-insulating compound semiconductor substrates. Conventional CPW structures show a larger attenuation constant due to the effects of the low-resistivity layer generated at the interface between the insulating layer of SiN and the HR-Si substrate, which has been detected through both experimental investigations and numerical calculations. A CPW structure that suppresses the effects of the low-resistivity layer is presented in this paper. The fabrication process is rather simple and can be smoothly integrated in conventional semiconductor device fabrication processes.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2010.2098878