Automatic interconnection rectification for SoC design verification based on the port order fault model

Embedded cores are being increasingly used in large system-on-a-chip (SoC) designs. The high complexity of SoC designs lead the design verification to be a challenge for system integrators. This paper presents an automatic interconnection rectification (AIR) technique based on the port order fault m...

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Bibliographic Details
Published in:IEEE transactions on computer-aided design of integrated circuits and systems 2003-01, Vol.22 (1), p.104-114
Main Authors: Wang, Chun-Yao, Tung, Shing-Wu, Jou, Jing-Yang
Format: Article
Language:English
Subjects:
Acceleration
Availability
Benchmarks
Circuit faults
Computer aided design
Design engineering
Fault detection
Fault diagnosis
Faults
Integrated circuit interconnections
Interconnection
Manufacturing
Ports
Rectification
System on chip
System-on-a-chip
Testing
Uninterruptible power systems
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Summary:Embedded cores are being increasingly used in large system-on-a-chip (SoC) designs. The high complexity of SoC designs lead the design verification to be a challenge for system integrators. This paper presents an automatic interconnection rectification (AIR) technique based on the port order fault model to detect, diagnose, and correct the misplacements of interconnection that occurred in the integration of a SoC design automatically. The experiments are conducted on combinational and sequential benchmarks. Experimental results show that the AIR can correct the misplaced interconnection exactly within reasonable efforts and, therefore, accelerates the integration verification of SoC designs.
ISSN:0278-0070
1937-4151
DOI:10.1109/TCAD.2002.805723