Reliability analysis of on-chip communication architectures: An MPEG-2 video decoder case study

In this paper, we present reliability analysis and comparison between on-chip communication architectures: dominant shared-bus AMBA and emerging Network-on-Chip (NoC); in the presence of single-event upsets (SEUs) using MPEG-2 video decoder as a case study. Employing SystemC-based fault simulations,...

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Bibliographic Details
Published in:Microprocessors and microsystems 2011-03, Vol.35 (2), p.285-296
Main Authors: Shafik, Rishad A., Al-Hashimi, Bashir M.
Format: Article
Language:English
Subjects:
Allocations
Computation
Decoders
Faults
Microprocessors
Network-on-Chip
On-chip communication architecture
Reliability
Reliability analysis
Routing (telecommunications)
Soft error
Soft errors
Tasks
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Summary:In this paper, we present reliability analysis and comparison between on-chip communication architectures: dominant shared-bus AMBA and emerging Network-on-Chip (NoC); in the presence of single-event upsets (SEUs) using MPEG-2 video decoder as a case study. Employing SystemC-based fault simulations, reliability of the decoders is studied in terms of SEUs experienced in the computation cores and communication interconnects. We show that for a given soft error rate (SER), NoC-based decoder experiences lower SEUs than AMBA-based decoder. Using peak signal-to-noise ratio (PSNR) and frame error ratio (FER) metrics to evaluate the impact of SEUs at application-level, we show that NoC-based decoder gives up to 4 dB higher PSNR, while AMBA experiences up to 3% lower FER. Furthermore, we investigate the impact of routing, application task mapping (distribution of tasks among computation cores) and architecture allocation (choice of number of computation cores) on the reliability of the decoders in the presence of SEUs.
ISSN:0141-9331
1872-9436
DOI:10.1016/j.micpro.2010.07.004