Fractional Frequency Synthesizers With Low Order Time-Variant Digital Sigma-Delta Modulator

This paper proposes the use of a digital ΣΔ modulator with pseudorandom variation of coefficients. The method improves PLL-based Fractional Frequency Synthesizer's performance while using a low order digital ΣΔ modulator. The time variant coefficients, in a low order digital ΣΔ modulator, signi...

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Bibliographic Details
Published in:IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2012-05, Vol.59 (5), p.969-978
Main Authors: Gonzalez-Diaz, V. R., Pena-Perez, A., Maloberti, F.
Format: Article
Language:English
Subjects:
Circuits
Digital
Expansion
fractional frequency synthesizers
Frequency modulation
Frequency ranges
Frequency synthesizers
MASH
Modulators
Multi-stage noise shaping
Noise
phase noise
Pseudorandom
Quantization
Sigma-Delta
Simulation
spur tones
Synthesizers
time variant
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Summary:This paper proposes the use of a digital ΣΔ modulator with pseudorandom variation of coefficients. The method improves PLL-based Fractional Frequency Synthesizer's performance while using a low order digital ΣΔ modulator. The time variant coefficients, in a low order digital ΣΔ modulator, significantly enlarge the pseudorandom output pattern period thus avoiding critical spur tones in the fractional synthesizer's phase-noise. Behavioral simulations let us verify that the proposed technique operates better than a higher order modulator with additive dither. With a low order ΣΔ architecture, the programmable divider phase-selection logic and frequency range of operation parameters can be relaxed.
ISSN:1549-8328
1558-0806
DOI:10.1109/TCSI.2012.2191317