Linearization Technique for Source-Degenerated CMOS Differential Transconductors

A supplementary linearization technique for CMOS differential pairs with resistive source degeneration is proposed. The approach exploits an auxiliary (degenerated) differential pair to drive the bulk terminals of the main pair. Transistor-level simulations on a design using a 0.25-mum process and p...

Full description

Saved in:
Bibliographic Details
Published in:IEEE transactions on circuits and systems. 2, Analog and digital signal processing Analog and digital signal processing, 2007-10, Vol.54 (10), p.848-852
Main Authors: Monsurro, P., Pennisi, S., Scotti, G., Trifiletti, A.
Format: Article
Language:English
Subjects:
Analog CMOS circuits
Circuits
CMOS
CMOS technology
Conversion
Equations
Filters
Harmonic distortion
Linearity
Linearization
linearization technique
Linearization techniques
Noise levels
Power consumption
Resistors
Terminals
Transconductance
Transconductors
Voltage
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:A supplementary linearization technique for CMOS differential pairs with resistive source degeneration is proposed. The approach exploits an auxiliary (degenerated) differential pair to drive the bulk terminals of the main pair. Transistor-level simulations on a design using a 0.25-mum process and powered with 2.5 V and 1 mA, show that total harmonic distortion (THD) in the voltage-to-current conversion is decreased by 10 dB (for an input differential signal with a peak amplitude of 0.5 V and for frequencies up to 100 MHz) compared to the traditional source-degenerated transconductor. This THD improvement is achieved with a negligible increase in power consumption.
ISSN:1549-7747
1057-7130
1558-3791
DOI:10.1109/TCSII.2007.906203