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A 14 bit 200 MS/s DAC With SFDR Unknown character 78 dBc, IM3 Unknown character - 83 dBc and NSD Unknown character - 163 dBm/Hz Across the Whole Nyquist Band Enabled by Dynamic-Mismatch Mapping

This paper presents a 14 bit 200 MS/s current-steering DAC with a novel digital calibration technique called dynamic-mismatch mapping (DMM). By optimizing the switching sequence of current cells to reduce the dynamic integral nonlinearity in an rm I - rm Q domain, the DMM technique digitally calibra...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 2011-06, Vol.46 (6), p.1371-1381
Main Authors: Tang, Yongjian, Briaire, Joost, Doris, Kostas, van Veldhoven, Robert, van Beek, Pieter CW, Hegt, Hans Johannes A, van Roermund, Arthur HM
Format: Article
Language:English
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Summary:This paper presents a 14 bit 200 MS/s current-steering DAC with a novel digital calibration technique called dynamic-mismatch mapping (DMM). By optimizing the switching sequence of current cells to reduce the dynamic integral nonlinearity in an rm I - rm Q domain, the DMM technique digitally calibrates all mismatch errors so that both the DAC static and dynamic performance can be significantly improved in a wide frequency range. Compared to traditional current source calibration techniques and static-mismatch mapping, DMM can reduce the distortion caused by both amplitude and timing mismatch errors. Compared to dynamic element matching, DMM does not increase the noise floor since the distortion is reduced, not randomized. The DMM DAC was implemented in a 0.14 mu hbox m CMOS technology and achieves a state-of-the-art performance of hbox SFDR Unknown character hbox 78 ~ dBc , hbox IM 3 < - hbox 83 ~ dBc and hbox NSD < - hbox 163 ~ dBm / hbox Hz in the whole 100 MHz Nyquist band.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2011.2126410