Tunnel junctions in a III-V nanowire by surface engineering

We demonstrate a simple way of fabricating high performance tunnel devices from p-doped InAs nanowires by tailoring the n-doped surface accumulation layer inherent to InAs surfaces. By using appropriate ammonium sulfide based surface passivation before metallization without any further thermal treat...

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Bibliographic Details
Published in:Nano research 2015-03, Vol.8 (3), p.980-989
Main Authors: Nadar, Salman, Rolland, Chloé, Lampin, Jean-François, Wallart, Xavier, Caroff, Philippe, Leturcq, Renaud
Format: Article
Language:English
Subjects:
Ammonium
Atomic/Molecular Structure and Spectra
Biomedicine
Biotechnology
Chemistry and Materials Science
Condensed Matter Physics
Devices
Diodes
Engineering
Geometry
High frequencies
InAs
Indium arsenides
Materials Science
Nanotechnology
Nanowires
Optimization
Research Article
Sulfides
Tunnel junctions
Tunnels (transportation)
几何形状
纳米线
表面工程
表面掺杂
表面钝化
隧道结
隧道设备
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Summary:We demonstrate a simple way of fabricating high performance tunnel devices from p-doped InAs nanowires by tailoring the n-doped surface accumulation layer inherent to InAs surfaces. By using appropriate ammonium sulfide based surface passivation before metallization without any further thermal treatment, we demonstrate characteristics of tunnel p-n junctions, namely Esaki and backward diodes, with figures of merit better than previously published for InAs homojunctions. The further optimization of both the surface doping, in a quantitative way, and the device geometry allows us to demonstrate that these nanowire-based technologically-simple diodes have promising direct current characteristics for integrated high frequency detection or generation.
ISSN:1998-0124
1998-0000
DOI:10.1007/s12274-014-0579-8