A new 28nm high-k metal gate CMOS logic one-time programmable memory cell

This work presents a high density high-k metal gate (HKMG) one-time programmable (OTP) cell. Without additional processes and steps, this OTP cell is fully compatible to 28nm HKMG CMOS process. The OTP cell adopts high-k dielectric breakdown as programming mechanism to obtain more than 10 super(5) t...

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Bibliographic Details
Published in:Japanese Journal of Applied Physics 2014-01, Vol.53 (4S), p.04ED01-1-04ED01-4
Main Authors: Hsiao, Woan Yun, Mei, Chin Yu, Shen, Wen Chao, Chih, Yue Der, King, Ya-Chin, Lin, Chrong Jung
Format: Article
Language:English
Subjects:
CMOS
Compatibility
Electric potential
Gates
High density
Immunity
Logic
Programming
Voltage
Online Access:Get full text
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Summary:This work presents a high density high-k metal gate (HKMG) one-time programmable (OTP) cell. Without additional processes and steps, this OTP cell is fully compatible to 28nm HKMG CMOS process. The OTP cell adopts high-k dielectric breakdown as programming mechanism to obtain more than 10 super(5) times of on/off read window. Moreover, it features low power and fast program speed by 4.5V program voltage in 100 mu s. In addition to the ultrasmall cell area of 0.0425 mu m super(2), the superior performance of disturb immunities and data retention further support the new logic OTP cell to be a very promising solution in advanced logic non-volatile memory (NVM) applications.
ISSN:0021-4922
1347-4065
DOI:10.7567/JJAP.53.04ED01