Design of two-terminal PNPN diode for high-density and high-speed memory applications

A vertical two-terminal silicon PNPN diode is presented for use in a high-density memory cell. The device design for high-speed operations was studied with experiments and calibrated simulations, which proves that the proposed memory cell can be operated at nanosecond range. The static and dynamic p...

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Bibliographic Details
Published in:Journal of semiconductors 2014, Vol.35 (1), p.51-55
Main Author: 童小东 吴昊 粱擎擎 钟会才 朱慧珑 赵超 叶甜春
Format: Article
Language:English
Subjects:
CMOS工艺
Devices
Diodes
High density
High speed
Memory (computers)
Nanostructure
Semiconductors
Very large scale integration
双端
存储单元
应用
硅二极管
设备设计
高密度
高速存储器
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Description
Summary:A vertical two-terminal silicon PNPN diode is presented for use in a high-density memory cell. The device design for high-speed operations was studied with experiments and calibrated simulations, which proves that the proposed memory cell can be operated at nanosecond range. The static and dynamic power dissipations were also studied, which indicated the availability of the proposed memory cell for VLS1 applications. Moreover, the memory cell is compatible with CMOS process, has little impact from process variation, and has good reliability.
ISSN:1674-4926
DOI:10.1088/1674-4926/35/1/014006