Towards quantitative electrostatic potential mapping of working semiconductor devices using off-axis electron holography

Pronounced improvements in the understanding of semiconductor device performance are expected if electrostatic potential distributions can be measured quantitatively and reliably under working conditions with sufficient sensitivity and spatial resolution. Here, we employ off-axis electron holography...

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Bibliographic Details
Published in:Ultramicroscopy 2015-05, Vol.152, p.10-20
Main Authors: Yazdi, Sadegh, Kasama, Takeshi, Beleggia, Marco, Samaie Yekta, Maryam, McComb, David W., Twitchett-Harrison, Alison C., Dunin-Borkowski, Rafal E.
Format: Article
Language:English
Subjects:
Doping
Electric potential
Electrostatics
Holography
In-situ biasing
Off-axis electron holography
pn junction
Quantitative analysis
Semiconductor devices
Spatial resolution
Three dimensional
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Summary:Pronounced improvements in the understanding of semiconductor device performance are expected if electrostatic potential distributions can be measured quantitatively and reliably under working conditions with sufficient sensitivity and spatial resolution. Here, we employ off-axis electron holography to characterize an electrically-biased Si p–n junction by measuring its electrostatic potential, electric field and charge density distributions under working conditions. A comparison between experimental electron holographic phase images and images obtained using three-dimensional electrostatic potential simulations highlights several remaining challenges to quantitative analysis. Our results illustrate how the determination of reliable potential distributions from phase images of electrically biased devices requires electrostatic fringing fields, surface charges, specimen preparation damage and the effects of limited spatial resolution to be taken into account.
ISSN:0304-3991
1879-2723
DOI:10.1016/j.ultramic.2014.12.012