Self-aligned multi-channel silicon nanowire field-effect transistors

► Self-assembled multi-channel Si nanowire field-effect transistors. ► Devices with more nanowire channels have better performance. ► Multi-channel Si nanowire FET has excellent subthreshold slope and ON/OFF ratio. ► Multi-channel SiNW FETs sustain higher drain voltage. Si nanowire field effect tran...

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Bibliographic Details
Published in:Solid-state electronics 2012-12, Vol.78, p.92-96
Main Authors: Zhu, Hao, Li, Qiliang, Yuan, Hui, Baumgart, Helmut, Ioannou, Dimitris E., Richter, Curt A.
Format: Article
Language:English
Subjects:
Applied sciences
Channels
Cross-disciplinary physics: materials science
rheology
Devices
Electronics
Exact sciences and technology
Materials science
Microelectronic fabrication (materials and surfaces technology)
Molecular electronics, nanoelectronics
Multi-channel nanowire FET
Nanocomposites
Nanomaterials
Nanoscale materials and structures: fabrication and characterization
Nanostructure
Nanowire field-effect transistor
Nanowires
Physics
Quantum wires
Self-alignment
Semiconductor devices
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Silicon
Transistors
Voltage tolerance
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Summary:► Self-assembled multi-channel Si nanowire field-effect transistors. ► Devices with more nanowire channels have better performance. ► Multi-channel Si nanowire FET has excellent subthreshold slope and ON/OFF ratio. ► Multi-channel SiNW FETs sustain higher drain voltage. Si nanowire field effect transistors (SiNW FETs) with multiple nanowire channels and different gate lengths have been fabricated by using a directed assembly approach combined with a standard photolithographic process. The electrical characteristics of SiNW FETs containing different numbers of nanowire channels were measured and compared. The multi-channel SiNW FETs show excellent performance: small subthreshold slope (≈75mV/dec), large ON/OFF ratio (≈108), good break-down voltage (>30V) and good carrier mobility (μp≈100cm2V−1s−1). These excellent device properties were achieved by using a clean self-alignment process and an improved device structure with Schottky barriers at the source and drain contacts. Such high-performance multi-nanowire FETs are attractive for logic, memory, and sensor applications.
ISSN:0038-1101
1879-2405
DOI:10.1016/j.sse.2012.05.058