A Single-Ended With Dynamic Feedback Control 8T Subthreshold SRAM Cell

• Published in: IEEE transactions on very large scale integration (VLSI) systems 2016-01, Vol.24 (1), p.373-377
• Main Authors: Kushwah, C. B., Vishvakarma, S. K.
• Format: Article
• Language: English
• Subjects: Arrays; Asymmetry; Dynamical systems; Dynamics; Feedback control; Microprocessors; Power demand; Random access memory; Single ended; SRAM cells; Standard deviation; static noise margin (SNM); static RAM (SRAM); Static random access memory; subthreshold; Transistors; ultralow power; Very large scale integration
• ISSN: 1063-8210; 1557-9999
• DOI: 10.1109/TVLSI.2015.2389891

A novel 8-transistor (8T) static random access memory cell with improved data stability in subthreshold operation is designed. The proposed single-ended with dynamic feedback control 8T static RAM (SRAM) cell enhances the static noise margin (SNM) for ultralow power supply. It achieves write SNM of 1.4× and 1.28× as that of isoarea 6T and read-decoupled 8T (RD-8T), respectively, at 300 mV. The standard deviation of write SNM for 8T cell is reduced to 0.4× and 0.56× as that for 6T and RD-8T, respectively. It also possesses another striking feature of high read SNM 2.33×, 1.23×, and 0.89× as that of 5T, 6T, and RD-8T, respectively. The cell has hold SNM of 1.43×, 1.23×, and 1.05× as that of 5T, 6T, and RD-8T, respectively. The write time is 71% lesser than that of single-ended asymmetrical 8T cell. The proposed 8T consumes less write power 0.72×, 0.6×, and 0.85× as that of 5T, 6T, and isoarea RD-8T, respectively. The read power is 0.49× of 5T, 0.48× of 6T, and 0.64× of RD-8T The power/energy consumption of 1-kb 8T SRAM array during read and write operations is 0.43× and 0.34×, respectively, of 1-kb 6T array. These features enable ultralow power applications of 8T.