Interface trap density estimation in FinFETs from the subthreshold current

In this work we present a measurement approach to determine the interface trap density in FinFETs as a function of their energy. It is based on the precise determination of the gate voltage dependent ideality factor of the subthreshold current in this device. The required measurement accuracy for te...

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Bibliographic Details
Main Authors: Schmitz, J., Kaleli, B., Kuipers, P., van den Berg, N., Smits, S. M., Hueting, R. J. E.
Format: Conference Proceeding
Language:English
Subjects:
Complementary MOSFETs (CMOSFETs)
Conferences
Current
Current measurement
Density
Devices
Drains
Electric potential
FinFETs
Gates
Interface states
Logic gates
Mathematical model
Microelectronics
MOS devices
Semiconductor device measurement
Subthreshold current
Temperature measurement
Traps
Voltage
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Description
Summary:In this work we present a measurement approach to determine the interface trap density in FinFETs as a function of their energy. It is based on the precise determination of the gate voltage dependent ideality factor of the subthreshold current in this device. The required measurement accuracy for temperature, drain current and transconductance is derived, and we propose an implementation for wafer-level device measurement on contemporary test set-ups. Exemplary interface trap distributions are shown as obtained from two FinFET device technologies, featuring the commonly observed bathtub shape.
ISSN:1071-9032
2158-1029
DOI:10.1109/ICMTS.2016.7476199