Improving Reliability and Energy Requirements of Memory in Body Sensor Networks

This paper evaluates the impact of different peripheral write assist techniques on the reliability and energy efficiency of Static Random Access Memory (SRAMs) in Body Sensor Networks (BSNs). The results of this characterization show that the best choice for a supply voltage and write assist combina...

Full description

Saved in:
Bibliographic Details
Main Authors: Patel, Harsh N., Yahya, Farah B., Calhoun, Benton H.
Format: Conference Proceeding
Language:English
Subjects:
and Read HSNM
Arrays
Boosting
Computer network reliability
Conferences
Delay
Delays
Design analysis
Electric potential
high-VT
Integrated circuit reliability
Networks
Random access memory
reliability
Reliability engineering
Sensors
Sub-threshold
VMIN
Voltage
Write HSNM
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:This paper evaluates the impact of different peripheral write assist techniques on the reliability and energy efficiency of Static Random Access Memory (SRAMs) in Body Sensor Networks (BSNs). The results of this characterization show that the best choice for a supply voltage and write assist combination varies based on the system level constraints and objectives. Further, factors outside the accessed cells such as half select stability dictate the optimal assist choice, the extent to which the assist should be applied, and the total array energy. Using data from a thorough study of assist options across VDDs, we establish strategies for supply voltage and assist selection based on system constraints to reduce the array energy. While VDD lowering assist technique provides the lowest array energy per operation of 8.5pJ at 0.5V when write delay is not constrained, negative bit line (NegBL) improves the write speed by 121X at the same voltage with 23pJ of energy.
ISSN:2380-6923
DOI:10.1109/VLSID.2016.37