Evaluation of energy savings on a VLIW processor through dynamic issue-width adaptation

The development of energy efficient hardware has been a trend in microprocessor design for the last two decades. VLIW processors are a representative example, since they have a simpler design and competitive performance, because their ILP exploitation is done statically by the compiler. In this pape...

Full description

Saved in:
Bibliographic Details
Main Authors: Giraldo, Juan S. P., Sartor, Anderson L., Carro, Luigi, Wong, Stephan, Beck, Antonio C. S.
Format: Conference Proceeding
Language:English
Subjects:
adaptive processor
Architecture (computers)
Clocks
Design analysis
Design engineering
Dynamical systems
Dynamics
Energy conservation
Energy consumption
Energy policy
Hardware
Microprocessors
Power dissipation
Registers
VLIW
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:The development of energy efficient hardware has been a trend in microprocessor design for the last two decades. VLIW processors are a representative example, since they have a simpler design and competitive performance, because their ILP exploitation is done statically by the compiler. In this paper, we study the energy savings that could be obtained by adapting such microarchitecture according to the current program phase. Our contribution is twofold. First, by executing a set of benchmarks on the ρ-vex configurable softcore VLIW processor, and by modifying the number of issues, we show the potentials of energy reduction. Then, with this information in hand, we developed an oracle experiment to dynamically vary the issue width of the processor according to the phase behavior, considering two different phase granularites. The potential energy savings using this policy could be as high as 81.5% when compared with the static version, executing the MiBench set.
ISSN:2150-5519
DOI:10.1109/RSP.2015.7416540