P-4: Electrical Characteristics of Dual-Gate CAAC-IGZO FET with Self-Aligned Top Gate

We fabricated dual‐gate CAAC‐IGZO FETs with self‐aligned top gates and investigated their electrical characteristics. The drain current was larger than expectedfrom the GI capacitance ratio to single‐gate FETs. Device simulation results suggest that shallow trap states and increase in electron mobil...

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Bibliographic Details
Published in:SID International Symposium Digest of technical papers 2016-05, Vol.47 (1), p.1132-1135
Main Authors: Honda, Ryunosuke, Suzuki, Akio, Matsuda, Shinpei, Saito, Satoru, Shima, Yukinori, Koezuka, Junichi, Yamazaki, Shunpei
Format: Article
Language:English
Subjects:
CAAC-IGZO
Capacitance
Devices
Drains
dual-gate structure
Electron mobility
Gates
liquid crystal display
Self alignment
self-aligned top gate
selfheating
Simulation
Technical papers
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Summary:We fabricated dual‐gate CAAC‐IGZO FETs with self‐aligned top gates and investigated their electrical characteristics. The drain current was larger than expectedfrom the GI capacitance ratio to single‐gate FETs. Device simulation results suggest that shallow trap states and increase in electron mobility by self‐heating of FETs can explain the large drain current.
ISSN:0097-966X
2168-0159
DOI:10.1002/sdtp.10821