Design, Modeling, and Fabrication of Chemical Vapor Deposition Grown MoS2 Circuits with E‑Mode FETs for Large-Area Electronics

• Published in: Nano letters 2016-10, Vol.16 (10), p.6349-6356
• Main Authors: Yu, Lili, El-Damak, Dina, Radhakrishna, Ujwal, Ling, Xi, Zubair, Ahmad, Lin, Yuxuan, Zhang, Yuhao, Chuang, Meng-Hsi, Lee, Yi-Hsien, Antoniadis, Dimitri, Kong, Jing, Chandrakasan, Anantha, Palacios, Tomas
• Format: Article
• Language: English
• ISSN: 1530-6984; 1530-6992
• DOI: 10.1021/acs.nanolett.6b02739

Two-dimensional electronics based on single-layer (SL) MoS2 offers significant advantages for realizing large-scale flexible systems owing to its ultrathin nature, good transport properties, and stable crystalline structure. In this work, we utilize a gate first process technology for the fabrication of highly uniform enhancement mode FETs with large mobility and excellent subthreshold swing. To enable large-scale MoS2 circuit, we also develop Verilog-A compact models that accurately predict the performance of the fabricated MoS2 FETs as well as a parametrized layout cell for the FET to facilitate the design and layout process using computer-aided design (CAD) tools. Using this CAD flow, we designed combinational logic gates and sequential circuits (AND, OR, NAND, NOR, XNOR, latch, edge-triggered register) as well as switched capacitor dc–dc converter, which were then fabricated using the proposed flow showing excellent performance. The fabricated integrated circuits constitute the basis of a standard cell digital library that is crucial for electronic circuit design using hardware description languages. The proposed design flow provides a platform for the co-optimization of the device fabrication technology and circuits design for future ubiquitous flexible and transparent electronics using two-dimensional materials.