Study and implementation of cluster hierarchical memory system of multicore cryptographic processor

In order to improve data bandwidth and enhance memory access efficiency in multi-core cryptographic processor, a kind of Cluster Hierarchical Memory System(CHMS) is proposed. According to characteristic of cryptographic algorithms/protocols parallel processing, shared memory unit and stream memory u...

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Bibliographic Details
Main Authors: Li, Junwei, Dai, Zibin, Li, Wei, Chen, Tao, Zhu, Yufei
Format: Conference Proceeding
Language:English
Subjects:
Algorithms
Clusters
Conferences
Cryptography
Electronics
Memory management
Microprocessors
Multicore processing
Parallel processing
Process control
Random access memory
Registers
Streams
System-on-chip
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Description
Summary:In order to improve data bandwidth and enhance memory access efficiency in multi-core cryptographic processor, a kind of Cluster Hierarchical Memory System(CHMS) is proposed. According to characteristic of cryptographic algorithms/protocols parallel processing, shared memory unit and stream memory unit are designed. Result shows that, CHMS can make related cryptographic core more tighter and reduce memory access conflicts. CHMS also has fewer memory access latency and higher efficiency.
ISSN:2162-755X
DOI:10.1109/ASICON.2015.7517211