A Filter Bank Mismatch Calibration Technique for Frequency-Interleaved ADCs

The filter bank mismatch of analog analysis filters in frequency-interleaved ADCs (FI-ADCs) degrades the system’s spurious-free dynamic range (SFDR) significantly. In this paper, a calibration approach for compensating such mismatch is presented. By modeling the parameter mismatches in the analysis...

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Bibliographic Details
Published in:Circuits, systems, and signal processing systems, and signal processing, 2016-11, Vol.35 (11), p.3847-3862
Main Authors: Qiu, Lei, Zheng, Yuanjin, Siek, Liter
Format: Article
Language:English
Subjects:
Analog
Calibration
Circuits and Systems
Dynamical systems
Electrical Engineering
Electronics and Microelectronics
Engineering
Filter banks
Frequency synthesizers
Instrumentation
Mathematical models
Matlab
Reconstruction
Signal,Image and Speech Processing
Synthesis
Trimming
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Summary:The filter bank mismatch of analog analysis filters in frequency-interleaved ADCs (FI-ADCs) degrades the system’s spurious-free dynamic range (SFDR) significantly. In this paper, a calibration approach for compensating such mismatch is presented. By modeling the parameter mismatches in the analysis filters, the filter bank mismatch compensation is divided into a coarse trimming mode and a fine-tuning mode. After the coarse trimming mode by trimming the resistors and capacitors in analog domain, the fine-tuning mode by updating coefficients of synthesis filters is further carried out in digital domain to achieve high-precision calibration. A design example of 10 GS/s 8-bit four-channel FI-ADC is built in MATLAB. The simulation results show that 25-tap synthesis filters could satisfy the reconstruction requirement of 8-bit ADC. The proposed calibration technique improves the SFDR to 51 dB, compensating the filter mismatch effectively.
ISSN:0278-081X
1531-5878
DOI:10.1007/s00034-016-0252-4