Software and firmware co-development using high-level synthesis

Accelerating trigger applications on FPGAs (using VHDL/Verilog) at the CMS experiment at CERN's Large Hadron Collider warrants consistency between each trigger firmware and its corresponding C++ model. This tedious and time consuming process of convergence is exacerbated during each upgrade stu...

Full description

Saved in:
Bibliographic Details
Published in:Journal of instrumentation 2017-01, Vol.12 (1), p.C01083-C01083
Main Authors: Ghanathe, N.P., Madorsky, A., Lam, H., Acosta, D.E., George, A.D., Carver, M.R., Xia, Y., Jyothishwara, A., Hansen, M.
Format: Article
Language:English
Subjects:
C++ (programming language)
Computer programs
Firmware
Large Hadron Collider
Software
Solenoids
Source code
Synthesis
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:Accelerating trigger applications on FPGAs (using VHDL/Verilog) at the CMS experiment at CERN's Large Hadron Collider warrants consistency between each trigger firmware and its corresponding C++ model. This tedious and time consuming process of convergence is exacerbated during each upgrade study. High-level synthesis, with its promise of increased productivity and C++ design entry bridges this gap exceptionally well. This paper explores the "single source code" approach using Vivado-HLS tool for redeveloping the upgraded CMS Endcap Muon Level-1 Track finder (EMTF). Guidelines for tight latency control, optimal resource usage and compatibility with CMS software framework are outlined in this paper.
ISSN:1748-0221
1748-0221
DOI:10.1088/1748-0221/12/01/C01083