Threshold voltage controllability in double-diffused-MOS transistors

• Published in: IEEE transactions on electron devices 1974-12, Vol.21 (12), p.778-784
• Main Authors: Pocha, M.D., Gonzalez, A.G., Dutton, R.W.
• Format: Article
• Language: English
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/T-ED.1974.18054

The sensitivity of double-diffused metal-oxide-semiconductor (D-MOS) transistor threshold voltage to fabrication process variations has been studied. Computed impurity profiles are used to study the process dependencies. For the double diffused process, the channel predeposition is shown to be the most critical step in threshold voltage control for long channel devices. Experimental results confirm this relationship. Process considerations appropriate for the fabrication of short channel D-MOS devices are also presented. Computed variations of threshold voltage with expected process tolerances for the channel predeposition are consistent with experimental results. Computer results show that for D-MOS deviceswith source junction depths of about 1 µm and channel lengths greater than 2 µm, threshold voltage can be controlled to ±20 percent using thermal diffusion and ±5 percent using ion implanted predeposition. Greater variation in threshold voltage is found for shorter channel lengths.