Effect Of Processor Layout On The Thermal Performance Of Fully Immersed Liquid-cooled Microelectronics

The natural convection cooling system of a fully immersed server in a dielectric liquid is analysed numerically, where the servers are in sealed capsules and submerged in a dielectric fluid. A reduced order flow model is developed under a saturated porous media flow assumption using a Darcy flow reg...

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Bibliographic Details
Published in:WIT Transactions on Engineering Sciences 2016-01, Vol.106, p.127
Main Authors: Al-Anii, Y, Almaneea, A, Kapur, N, Summers, J, Thompson, H
Format: Article
Language:English
Subjects:
Central processing units
Computational fluid dynamics
Convection cooling
Convective heat transfer
Cooling systems
CPUs
Fluid flow
Free convection
Heat sources
Mathematical models
Microprocessors
Porous media
Reduced order models
Stokes flow
Thermodynamic properties
Time marching
Vertical orientation
Vertical separation
Viscosity
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Summary:The natural convection cooling system of a fully immersed server in a dielectric liquid is analysed numerically, where the servers are in sealed capsules and submerged in a dielectric fluid. A reduced order flow model is developed under a saturated porous media flow assumption using a Darcy flow regime and the Stokes equations solved numerically using successive over relaxation and time marching techniques. The simplified model is shown to agree well with predictions from full Navier–Stokes flow analyses and then used to study the role of spatial parameters on the convective heat transfer, in particular the effect of the locations and separations of two heat sources representing two central processing units (CPUs). The flow and heat transfer characteristics are analysed for a range of modified Rayleigh numbers between 0.5 and 300 and a correlation for Nusselt number is obtained which shows that the thermal behaviour is most strongly influenced by the modified Rayleigh number and that the vertical separation of the CPUs is more influential than the vertical position of the lower CPU.
ISSN:1746-4471
1743-3533
DOI:10.2495/HT160131