Solvent-Mediated Affinity of Polymer-Wrapped Single-Walled Carbon Nanotubes for Chemically Modified Surfaces

• Published in: Langmuir 2019-09, Vol.35 (38), p.12492-12500
• Main Authors: Dwyer, Jonathan H, Shen, Zhizhang, Jinkins, Katherine R, Wei, Wei, Arnold, Michael S, Van Lehn, Reid C, Gopalan, Padma
• Format: Article
• Language: English
• ISSN: 0743-7463; 1520-5827
• DOI: 10.1021/acs.langmuir.9b02217

Semiconducting single-walled carbon nanotube (s-CNT) arrays are being explored for next-generation semiconductor electronics. Even with the multitude of alignment and spatially localized s-CNT deposition methods designed to control s-CNT deposition, fundamental understanding of the driving forces for s-CNT deposition is still lacking. The individual roles of the dispersant, solvent, target substrate composition, and the s-CNT itself are not completely understood because it is difficult to decouple deposition parameters. Here, we study poly­[(9,9-dioctylfluorenyl-2,7-diyl)-alt-co-(6,6′-[2,2′-{bipyridine}])] (PFO-BPy)-wrapped s-CNT deposition from solution onto a chemically modified substrate. We fabricate various self-assembled monolayers (SAMs) to gain a greater understanding of substrate effects on PFO-BPy-wrapped s-CNT deposition. We observe that s-CNT deposition is dependent on both the target substrate and s-CNT dispersion solvent. To complement the experiments, molecular dynamics simulations of PFO-BPy-wrapped s-CNT deposition on two different SAMs are performed to obtain mechanistic insights into the effect of the substrate and solvent on s-CNT deposition. We find that the global free-energy minimum associated with favorable s-CNT adsorption occurs for a configuration in which the minimum of the solvent density around the s-CNT coincides with the minimum of the solvent density above a SAM-grafted surface, indicating that solvent structure near a SAM-grafted surface determines the adsorption free-energy landscape driving s-CNT deposition. Our results will help guide informative substrate design for s-CNT array fabrication in semiconductor devices.