Edge computing in space: Field programmable gate array-based solutions for spectral and probabilistic analysis of time series

This paper addresses the problem of performing time series analysis on-board a spacecraft, where the number of constraints is much bigger than for applications running in regular (i.e., ground-based) environments. An objective of modern spacecraft technologies designed for space exploration is to pe...

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Bibliographic Details
Published in:Review of scientific instruments 2019-11, Vol.90 (11), p.114501-114501
Main Authors: Opincariu, Laurenţiu, Deak, Norbert, Creţ, Octavian, Echim, Marius, Munteanu, Costel, Văcariu, Lucia
Format: Article
Language:English
Subjects:
Algorithms
Data processing
Design optimization
Digital signal processing
Distribution functions
Edge computing
Field programmable gate arrays
Onboard data processing
Power spectral density
Probabilistic analysis
Probability distribution functions
Scientific apparatus & instruments
Space exploration
Spacecraft
Statistical analysis
Time series
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Summary:This paper addresses the problem of performing time series analysis on-board a spacecraft, where the number of constraints is much bigger than for applications running in regular (i.e., ground-based) environments. An objective of modern spacecraft technologies designed for space exploration is to perform on-board data processing tasks, in order to increase the amount of data available for scientific analysis. Field Programmable Gate Array (FPGA) devices are considered as good candidates for hardware implementations of such systems. In order to optimize the usage of on-board resources, FPGAs share their resources between several digital signal processing (DSP) algorithms. In this paper, we describe the design and implementation of such an optimized design where two DSP algorithms are implemented on the same FPGA: (1) the power spectral density and (2) the multiscale probability distribution functions. The entire implementation process is described in detail, including a discussion about the main architectural choices. The proposed solutions focus on optimization of area, speed, and power. The tests performed, on both synthetic and real data, demonstrate the feasibility of our approach and constitute the first step toward porting the design on space-grade FPGAs.
ISSN:0034-6748
1089-7623
DOI:10.1063/1.5119231