Loading…
Effects of an n-layer under the gate on the performance of InP MESFET's
The microwave and dc performance of Schottky barrier InP FET's where an n - layer of low carrier concentration is incorporated between the gate metal and the active layer are reported. FET's having gate dimensions of 1 µm × 200 µm and a channel length of 7 µm were fabricated. The observed...
Saved in:
Published in: | IEEE transactions on electron devices 1979-03, Vol.26 (3), p.238-241 |
---|---|
Main Authors: | , , |
Format: | Article |
Language: | English |
Citations: | Items that cite this one |
Online Access: | Get full text |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
cited_by | cdi_FETCH-LOGICAL-c290t-8dcb17b018a725210fdcff4dfcd13b392c3df721d68a932ca4c773f8cf3f73473 |
---|---|
cites | |
container_end_page | 241 |
container_issue | 3 |
container_start_page | 238 |
container_title | IEEE transactions on electron devices |
container_volume | 26 |
creator | Morkoc, H. Andrews, J.T. Hyder, S.B. |
description | The microwave and dc performance of Schottky barrier InP FET's where an n - layer of low carrier concentration is incorporated between the gate metal and the active layer are reported. FET's having gate dimensions of 1 µm × 200 µm and a channel length of 7 µm were fabricated. The observed gate leakage current was about 1 µA at a reverse bias of -12 V. The voltage that can be applied to the drain before breakdown was about +20 V while the gate bias was kept at -5 V. A maximum available gain of 6 dB in a microstrip circuit was measured at 9 GHz. |
doi_str_mv | 10.1109/T-ED.1979.19414 |
format | article |
fullrecord | <record><control><sourceid>proquest_ieee_</sourceid><recordid>TN_cdi_proquest_miscellaneous_23457520</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>1479992</ieee_id><sourcerecordid>23457520</sourcerecordid><originalsourceid>FETCH-LOGICAL-c290t-8dcb17b018a725210fdcff4dfcd13b392c3df721d68a932ca4c773f8cf3f73473</originalsourceid><addsrcrecordid>eNpFkEtPAjEUhRujiYiuXbjpSleFvmY6XRoYkQSjibhuSudWMUMH22HBv7eAiZtzH_nOzc1B6JbREWNUj5ekno6YVjqLZPIMDVhRKKJLWZ6jAaWsIlpU4hJdpfSdx1JKPkCz2ntwfcKdxzbgQFq7h4h3ocnafwH-tD3gLhz7LUTfxY0NDg78PLzhl_r9qV4-pGt04W2b4OavDtFH3k-eyeJ1Np88LojjmvakatyKqVV-xipecEZ947yXjXcNEyuhuRONV5w1ZWW14M5Kp5TwlfPCKyGVGKL7091t7H52kHqzWScHbWsDdLtkuJCFKjjN4PgEutilFMGbbVxvbNwbRs0hMLM09dQcAjPHwLLj7uRYA8A_LZXWmotfMhhldQ</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>23457520</pqid></control><display><type>article</type><title>Effects of an n-layer under the gate on the performance of InP MESFET's</title><source>IEEE Xplore (Online service)</source><creator>Morkoc, H. ; Andrews, J.T. ; Hyder, S.B.</creator><creatorcontrib>Morkoc, H. ; Andrews, J.T. ; Hyder, S.B.</creatorcontrib><description>The microwave and dc performance of Schottky barrier InP FET's where an n - layer of low carrier concentration is incorporated between the gate metal and the active layer are reported. FET's having gate dimensions of 1 µm × 200 µm and a channel length of 7 µm were fabricated. The observed gate leakage current was about 1 µA at a reverse bias of -12 V. The voltage that can be applied to the drain before breakdown was about +20 V while the gate bias was kept at -5 V. A maximum available gain of 6 dB in a microstrip circuit was measured at 9 GHz.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/T-ED.1979.19414</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>IEEE</publisher><ispartof>IEEE transactions on electron devices, 1979-03, Vol.26 (3), p.238-241</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c290t-8dcb17b018a725210fdcff4dfcd13b392c3df721d68a932ca4c773f8cf3f73473</citedby></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1479992$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,27898,27899,54768</link.rule.ids></links><search><creatorcontrib>Morkoc, H.</creatorcontrib><creatorcontrib>Andrews, J.T.</creatorcontrib><creatorcontrib>Hyder, S.B.</creatorcontrib><title>Effects of an n-layer under the gate on the performance of InP MESFET's</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>The microwave and dc performance of Schottky barrier InP FET's where an n - layer of low carrier concentration is incorporated between the gate metal and the active layer are reported. FET's having gate dimensions of 1 µm × 200 µm and a channel length of 7 µm were fabricated. The observed gate leakage current was about 1 µA at a reverse bias of -12 V. The voltage that can be applied to the drain before breakdown was about +20 V while the gate bias was kept at -5 V. A maximum available gain of 6 dB in a microstrip circuit was measured at 9 GHz.</description><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1979</creationdate><recordtype>article</recordtype><recordid>eNpFkEtPAjEUhRujiYiuXbjpSleFvmY6XRoYkQSjibhuSudWMUMH22HBv7eAiZtzH_nOzc1B6JbREWNUj5ekno6YVjqLZPIMDVhRKKJLWZ6jAaWsIlpU4hJdpfSdx1JKPkCz2ntwfcKdxzbgQFq7h4h3ocnafwH-tD3gLhz7LUTfxY0NDg78PLzhl_r9qV4-pGt04W2b4OavDtFH3k-eyeJ1Np88LojjmvakatyKqVV-xipecEZ947yXjXcNEyuhuRONV5w1ZWW14M5Kp5TwlfPCKyGVGKL7091t7H52kHqzWScHbWsDdLtkuJCFKjjN4PgEutilFMGbbVxvbNwbRs0hMLM09dQcAjPHwLLj7uRYA8A_LZXWmotfMhhldQ</recordid><startdate>19790301</startdate><enddate>19790301</enddate><creator>Morkoc, H.</creator><creator>Andrews, J.T.</creator><creator>Hyder, S.B.</creator><general>IEEE</general><scope>AAYXX</scope><scope>CITATION</scope><scope>8FD</scope><scope>H8D</scope><scope>L7M</scope></search><sort><creationdate>19790301</creationdate><title>Effects of an n-layer under the gate on the performance of InP MESFET's</title><author>Morkoc, H. ; Andrews, J.T. ; Hyder, S.B.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c290t-8dcb17b018a725210fdcff4dfcd13b392c3df721d68a932ca4c773f8cf3f73473</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1979</creationdate><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Morkoc, H.</creatorcontrib><creatorcontrib>Andrews, J.T.</creatorcontrib><creatorcontrib>Hyder, S.B.</creatorcontrib><collection>CrossRef</collection><collection>Technology Research Database</collection><collection>Aerospace Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Morkoc, H.</au><au>Andrews, J.T.</au><au>Hyder, S.B.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Effects of an n-layer under the gate on the performance of InP MESFET's</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>1979-03-01</date><risdate>1979</risdate><volume>26</volume><issue>3</issue><spage>238</spage><epage>241</epage><pages>238-241</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>The microwave and dc performance of Schottky barrier InP FET's where an n - layer of low carrier concentration is incorporated between the gate metal and the active layer are reported. FET's having gate dimensions of 1 µm × 200 µm and a channel length of 7 µm were fabricated. The observed gate leakage current was about 1 µA at a reverse bias of -12 V. The voltage that can be applied to the drain before breakdown was about +20 V while the gate bias was kept at -5 V. A maximum available gain of 6 dB in a microstrip circuit was measured at 9 GHz.</abstract><pub>IEEE</pub><doi>10.1109/T-ED.1979.19414</doi><tpages>4</tpages></addata></record> |
fulltext | fulltext |
identifier | ISSN: 0018-9383 |
ispartof | IEEE transactions on electron devices, 1979-03, Vol.26 (3), p.238-241 |
issn | 0018-9383 1557-9646 |
language | eng |
recordid | cdi_proquest_miscellaneous_23457520 |
source | IEEE Xplore (Online service) |
title | Effects of an n-layer under the gate on the performance of InP MESFET's |
url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-03-04T03%3A55%3A49IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_ieee_&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Effects%20of%20an%20n-layer%20under%20the%20gate%20on%20the%20performance%20of%20InP%20MESFET's&rft.jtitle=IEEE%20transactions%20on%20electron%20devices&rft.au=Morkoc,%20H.&rft.date=1979-03-01&rft.volume=26&rft.issue=3&rft.spage=238&rft.epage=241&rft.pages=238-241&rft.issn=0018-9383&rft.eissn=1557-9646&rft.coden=IETDAI&rft_id=info:doi/10.1109/T-ED.1979.19414&rft_dat=%3Cproquest_ieee_%3E23457520%3C/proquest_ieee_%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-c290t-8dcb17b018a725210fdcff4dfcd13b392c3df721d68a932ca4c773f8cf3f73473%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_pqid=23457520&rft_id=info:pmid/&rft_ieee_id=1479992&rfr_iscdi=true |