An Approach to Scientific Array Processing: The Architectural Design of the AP-120B/FPS-164 Family

• Published in: Computer (Long Beach, Calif.) Calif.), 1981-09, Vol.14 (9), p.18-27
• Main Author: Charlesworth, A.E.
• Format: Article
• Language: English
• Subjects: Array signal processing; Computer architecture; Computer interfaces; Convolution; Costs; Floating-point arithmetic; Kernel; Process design; Scientific computing; Signal processing algorithms
• ISSN: 0018-9162; 1558-0814
• DOI: 10.1109/C-M.1981.220595

In 1975, Floating Point Systems introduced the AP-120B, the initial member of its array processor family. George O'Leary, vice president of engineering, and I codesigned the architecture. A major inspiration was an integer array processor designed and implemented by Glen Culler of Culler Harrison, Inc. The AP-120B and two later models, the AP-190L and FPS-100, have been used primarily in signal processing. In 1980, the FPS-164 was introduced to extend our AP architecture into largescale scientific computing. This article centers on design trade-offs and the use of internal architecture in our APs, features that determine how fast they can perform useful arithmetic. External architecture issues, such as the best way to interface an AP to a host computer, are outside the present scope of this discussion.