The Trials of Wafer-Scale Integration

Units containing superchips are being developed in the US and Japan. They will integrate millions of logic gates into a single package the size of a person's hand. The entire wafer will ultimately be encompassed by the circuits. Superchips of this size may be termed wafer-scale integrated (WSI)...

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Bibliographic Details
Published in:IEEE spectrum 1984-01, Vol.21 (10), p.32-39
Main Authors: McDonald, Jack F, Rogers, Edwin H, Rose, Kenneth, Steckl, Andrew J
Format: Magazinearticle
Language:English
Subjects:
Electrostatic discharges
Integrated circuits
Microprocessors
Product development
R&D
Research & development
Semiconductors
Online Access:Get full text
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Summary:Units containing superchips are being developed in the US and Japan. They will integrate millions of logic gates into a single package the size of a person's hand. The entire wafer will ultimately be encompassed by the circuits. Superchips of this size may be termed wafer-scale integrated (WSI) systems. Already, several commercial WSI memory products are appearing in Japan. Most notable of these is the 4-megabit WSI ROM, manufactured by the NTT Musashino Electrical Communication Laboratory in Tokyo, which holds the entire Kanji alphabet. Metal-oxide semiconductor (MOS) circuits are the dominant very large scale integrated circuit technology. Input/output pads on the integrated circuits are vulnerable to electrostatic discharge, especially on MOS circuits. As a result, the reliability of packaged integrated circuits is improved if the number of pin connections which protrude from the system is reduced. Although there is a technology base for managing the removal of WSI heat, heat stress is a problem for the package. As in Japan, the first commercial domestic WSI products in the US will probably be memory systems.
ISSN:0018-9235
1939-9340
DOI:10.1109/MSPEC.1984.6370295